Aspects of the disclosure are directed to a low power differential circuit. In accordance with one aspect, the low power differential circuit includes a crystal oscillator to generate a differential sinusoidal waveform, the crystal oscillator having a first terminal and a second terminal; a first capacitor coupled to the first terminal; a first inverter including a first input coupled to the first terminal and a first output coupled to the first capacitor; a second capacitor coupled to the second terminal; and a second inverter including a second input coupled to the second terminal and a second output coupled to the second capacitor, wherein the first inverter and the second inverter generate a synchronous square wave signal.

A crystal oscillation circuit includes: two resistors; two capacitors; and an inverter. A crystal oscillation circuit for the crystal oscillation circuit includes: arranging the two resistors in parallel with the two capacitors such that an area of a wiring feedback path from an output terminal to an input terminal of the inverter is minimized, and arranging terminals of the two capacitors to be connected to ground close to each other.

A voltage sensor device includes an oscillator unit, the oscillator unit having a tunable bulk acoustic wave (BAW) resonator device and an oscillator core. The voltage sensor device also includes a frequency analyzer configured to obtain frequency measurements for the oscillator unit and to determine a voltage sense value based on a comparison of at least some of the obtained frequency measurements. The voltage sensor device also includes an output interface configured to store or output voltage sense values determined by the frequency analyzer.

An integrated circuit includes an inverter, first and second capacitors, a resistor, and a transistor. The inverter has an input and an output. The first capacitor is coupled to a ground. The transistor has a first transistor terminal, a second transistor terminal, and a control input. The first transistor terminal is coupled to the first capacitor and the second transistor terminal is coupled to the input of the inverter. The second capacitor is coupled between the output of the inverter and the ground. The resistor is coupled between the output of the inverter and the first transistor terminal.

The present invention relates to an active shunt capacitance cancelling oscillator circuit. Such systems can be used in resonator-based methods, while avoiding impedance distortion and phase shift anomalies.

Examples of increasing yield and operating temperature range of transmitters are disclosed. In one example, a transmitter has an a thin-film bulk acoustic (FBAR) resonator. The transmitter may be a Bluetooth Low Energy (BLE) transmitter. In this example, the FBAR-based BLE transmitter does not require or have a phase locked loop, and does not require or have a crystal reference. The FBAR-based BLE transmitter may have an oscillator with a split capacitor array. The oscillator may be a Pierce oscillator with a split capacitor array. The FBAR-based transmitter and calibration methods described herein provide a greater yield and wider operating range than prior transmitters.

To provide an oven controlled crystal oscillator which can keep constant the temperature of a quartz resonator housed within a thermostatic oven, thereby ensuring stable operation of the quartz resonator. An oven controlled crystal oscillator has a control system for exercising control so that the temperature of a quartz resonator becomes a target temperature Ttarg of a predetermined fixed value. The quartz resonator is housed within a thermostatic oven which is configured to compare a set temperature Tr and a measured temperature Tic based on an outside air temperature measured by a temperature sensor and which is controlled so that a difference between both temperatures is narrowed. The quartz resonator has characteristics influenced by an environmental temperature. The control system adds a predetermined feedback amount δT to the target temperature Ttarg of the fixed value to generate a new set temperature Tr for comparison with the measured temperature Tic so that when the measured temperature Tic lowers, the set temperature Tr becomes high, or when the measured temperature Tic rises, the set temperature Tr becomes low.

An oscillation circuit includes an oscillator (X.sub.1), capacitors (C.sub.1, C.sub.2) connected between two terminals of the oscillator (X.sub.1), and an amplification circuit (A.sub.1) having an input terminal connected to a connecting point between the oscillator (X.sub.1) and the capacitor (C.sub.1) and an output terminal connected to a connecting point between the capacitor (C.sub.1) and the capacitor (C.sub.2). The amplification circuit (A.sub.1) includes an n-type transistor (M.sub.1) and a p-type transistor (M.sub.2) respectively having source terminals, the connecting point of which is connected to the output terminal of the amplification circuit (A.sub.1), a p-type transistor (M.sub.3) configured to connect a gate terminal of the n-type transistor (M.sub.1) to a power supply terminal at the time of an oscillation stop and disconnect the power supply terminal and the gate terminal of the n-type transistor (M.sub.1) at the time of an oscillation operation, and an n-type transistor (M.sub.4) configured to connect a gate terminal of the p-type transistor (M.sub.2) to ground at the time of the oscillation stop and disconnect a ground terminal and the gate terminal of the p-type transistor (M.sub.2) at the time of the oscillation operation. It is possible to implement low power consumption and high-speed oscillation activation of the oscillation circuit.

An oscillator acceleration circuit, configured to accelerate the start-up of an oscillator, wherein the oscillator has an input terminal and an output terminal. The oscillator acceleration circuit includes an inverting amplifier, a feedback resistor and an acceleration circuit; the inverting amplifier has an input terminal and an output terminal correspondingly coupled to the input terminal and the output terminal of the oscillator. The feedback resistor is coupled between the input terminal and the output terminal of the oscillator, and the acceleration circuit is coupled between the input terminal and the output terminal of the oscillator. The acceleration circuit is configured to provide a transfer function, wherein the transfer function is the same as the transfer function provided by a resistor and a capacitor connected in parallel; wherein the resistance of the resistor is less than zero.

A clock generator can include a Fin Field Effect Transistor (FinFET) oscillator and a phased-locked loop (PLL). The FinFET oscillator can generate a FinFET signal. The PLL can generate an output clock signal based on a reference clock signal and the FinFET signal.