Patent classifications
H03F3/2171
AUDIO AMPLIFIER WITH FAST WAKE-UP POWER SUPPLY AND PEAK CURRENT REDUCTION
An improved audio amplifier system can both reduce power consumption by supporting a standby mode and shorten wake time when resuming from the standby mode. The audio amplifier system may reduce power by entering a sleep or standby state in response to a command and/or detecting that an audio input signal is not received. Further, the audio amplifier system may use a burst generator to periodically or intermittently activate the power supply during standby mode. By periodically or intermittently activating the power supply, one or more of the capacitors may be charged. By charging the capacitors during standby mode, the time to wake from standby mode may be significantly reduced. In some cases, the wake time may be reduced by several order of magnitudes (e.g., from seconds to milliseconds).
COMMON MODE VOLTAGE CONTROLLER FOR SELF-BOOSTING PUSH PULL AMPLIFIER
Various implementations include a common mode voltage controller for a self-boosting push pull amplifier. In some implementations, input signal are processed by: calculating, based upon the input signal, a maximum duty cycle to achieve a target differential in an output of the self-boosting push pull amplifier; calculating, based on the input signal, a set of control parameters associated with adjusting a common mode voltage of the output; and generating, based on the input signal, a pair of signals configured to adjust the common mode voltage of the output, wherein the pair of signals include a gain adjustment and offset based on the maximum duty cycle and the set of control parameters, and wherein the pair of signals are configured to maintain the target differential in the output of the self-boosting push pull amplifier as the common mode voltage is adjusted to a different operating point.
FAST SWITCHED PULSED RADIO FREQUENCY AMPLIFIERS
A switching system is connected to the power amplifier of an RF system. The switching system can switch the DC supply voltage to the power amplifier while handling the high DC current and the nanosecond switching speed requirements that are mandatory for most RF systems. The embodiments can rapidly control DC voltages but not interfere with the optimized operation of the RF transistor. The embodiments provide a desired sharp turn-on leading edge for an RF pulse while eliminating the extremely long and undesirable ramp down that typically occurs beyond the desired RF pulse period.
Class-E outphasing power amplifier with efficiency and output power enhancement circuits and method
An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S.sub.1(t)). A first reactive element (C.sub.A-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (L.sub.A-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S.sub.2(t)), a third reactive element (C.sub.A-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (L.sub.EEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.
Multilevel class-D amplifiers
Implementations of a class-D amplifier can be used to amplify an input analog signal and provide to a load a multilevel amplified signal having an amplitude larger than a voltage level of a power source used by the class-D amplifier.
Switching amplifier
A RF amplifier is provided that includes a plurality of switch modules connected in a cascade configuration and divided into disjoint sets in accordance with their corresponding distinct peak DC voltages or currents, each switch module including a plurality of switch devices connected in a half-bridge or full-bridge circuit and a DC voltage or current source electrically connected with the half-bridge or full-bridge circuit, and a control circuit configured to determine an output voltage or current of the RF amplifier at the next switching interval, examine the states of the switching devices in the respective switch modules to identify a combination of least-recently-switched switching devices within each set of switch modules that, when switched to an opposite state, will produce the determined output voltage or current, and switch to an opposite state, at the next switching interval, the switching devices in the identified combination.
Power supply rejection rate through noise cancellation in an audio amplifier loop
Embodiments contained in the disclosure provide a method of cancelling power supply noise that affects the output of a class-D audio amplifier. The method begins when an alternating current (AC) coupled signal is input into an inverting amplifier. That signal is then amplified in the inverting amplifier. The amplified AC coupled signal is then feed through a resistor capacitor (RC) network, and from the RC network to an inverting input of the inverting amplifier. The output of a high pass filter is used to cancel the power supply ripple signal as the output of the high pass filter is injected into a supply voltage line. The cancelling signal is opposite in magnitude to the power supply ripple signal. The apparatus includes an inverting amplifier, a capacitor for coupling to an AC signal, and a resistor, in combination with the capacitor.
CLASS D AMPLIFIER
A class D amplifier output stage including an input for receiving an input signal, an output for providing an output signal to a load, serially coupled upper and lower switching devices configured to provide an output signal to the output, a driver circuit configured to receive the input signal, and to derive therefrom first and second drive signals for driving the upper and lower switching devices alternately from a conducting state into a non-conducting state and vice versa, such that the conducting state periods of the upper switching device with respect to those of the lower switching device are mutually exclusive and separated by dead time intervals during which both upper and lower output transistors are non-conducting. To reduce distortion and more particularly, total harmonic distortion (THD), the amplifier output stage includes a substantially linear circuit configured to provide a bidirectional current sink for residual currents from the load occurring during at least part of each dead time interval.
DC-DC CONVERTER AND CONTROL CIRCUIT WITH LOW-POWER CLOCKED COMPARATOR REFERENCED TO SWITCHING NODE FOR ZERO VOLTAGE SWITCHING
Disclosed examples provide DC-DC converters and control circuits to provide high and low-side driver signals and to selectively adjust a delay time between a low-side switching device turning off and a high-side switching device turning on according to a comparator signal, including a clocked comparator circuit referenced to a switching node to sample the voltage across the high-side switching device in response to a first edge of the high-side driver signal, and to generate the comparator signal indicating a polarity of the sampled high-side switch voltage to facilitate zero voltage switching of the high-side switching device.
Amplifier with an at least second order filter in the control loop
A Class D amplifier having an integrating primary amplifier with an internal feedback, the amplifier further comprising a feedback loop with a filter of at least second order.