Patent classifications
H03F3/3016
Detector circuit and wireless communication apparatus
A detector circuit includes a first inverter including an input node coupled via a first capacitor to a transmission path for transmitting an AC signal, the first inverter outputting an output voltage in accordance with power of the AC signal, wherein the output voltage increases with increasing temperature, a second inverter including an input node coupled to the transmission path, the second inverter outputting an output voltage in accordance with power of the AC signal, wherein the output voltage decreases with increasing temperature, a third capacitor including one electrode coupled to either an output electrode of the first inverter or an output node of the second inverter, a first resistor coupled between the output node of the first inverter and an output node of the detector circuit, and a second resistor coupled between the output node of the second inverter and the output node of the detector circuit.
NOISE-CANCELING TRANSIMPEDANCE AMPLIFIER (TIA) SYSTEMS
One embodiment describes a transimpedance amplifier (TIA) system. The system includes an inverter TIA stage interconnecting an input node and an output node and configured to invert an input signal at the input node to provide a first inverted signal component at the output node. The system also includes a noise-canceling inverter stage arranged in parallel with the inverter stage and being configured to invert the input signal to provide a second inverted signal component and to invert noise from the input node. Thus, the first and second inverted signal components constructively combine at the output node and the noise is substantially mitigated at the output node.
DETECTOR CIRCUIT AND WIRELESS COMMUNICATION APPARATUS
A detector circuit includes a first inverter including an input node coupled via a first capacitor to a transmission path for transmitting an AC signal, the first inverter outputting an output voltage in accordance with power of the AC signal, wherein the output voltage increases with increasing temperature, a second inverter including an input node coupled to the transmission path, the second inverter outputting an output voltage in accordance with power of the AC signal, wherein the output voltage decreases with increasing temperature, a third capacitor including one electrode coupled to either an output electrode of the first inverter or an output node of the second inverter, a first resistor coupled between the output node of the first inverter and an output node of the detector circuit, and a second resistor coupled between the output node of the second inverter and the output node of the detector circuit.
Rail-To-Rail Source Follower
A source follower method, system, and apparatus provide rail-to-rail capability to an output voltage terminal of a voltage follower feedback biased CMOS output circuit by providing a control circuit which includes first and second bypass transistors that are connected in parallel between first and second control circuit input/output terminals and controlled, respectively, by first and second control circuit inputs, and which also includes first and second current sources for injecting source and sink currents in the output node as a function, respectively, of a first bypass current through the first bypass transistor which turns ON when the output voltage rises above a top threshold voltage level and of a second bypass current through the second bypass transistor which turns ON when the output voltage falls below a bottom threshold voltage level.
Rail-to-rail source follower
A source follower method, system, and apparatus provide rail-to-rail capability to an output voltage terminal of a voltage follower feedback biased CMOS output circuit by providing a control circuit which includes first and second bypass transistors that are connected in parallel between first and second control circuit input/output terminals and controlled, respectively, by first and second control circuit inputs, and which also includes first and second current sources for injecting source and sink currents in the output node as a function, respectively, of a first bypass current through the first bypass transistor which turns ON when the output voltage rises above a top threshold voltage level and of a second bypass current through the second bypass transistor which turns ON when the output voltage falls below a bottom threshold voltage level.
Buffer with increased headroom
Provided herein are amplifiers, such as buffers, with increased headroom. An amplifier stage includes a follower transistor and current source configured to receive a power supply voltage comprising an alternating current component and a direct current component. The alternating current component of the power supply voltage has substantially the same frequency and magnitude as the input signal received by the follower transistor. In radio frequency (RF) and intermediate frequency (IF) buffer applications, for example, the increased headroom can allow for linear buffering of an input signals with increased amplitude so that the output power one decibel (OP1dB) compression point can be increased.
ELECTRONIC DEVICE FOR DRIVING TUNABLE DEVICE
An electronic device is provided. The electronic device includes a tunable component and a first source follower circuit. The tunable component is electrically connected to a circuit node. The first source follower circuit is electrically connected to the circuit node. The first source follower circuit includes a first control terminal and a first terminal. The first control terminal is electrically connected to the first terminal.
Class AB amplifier with bias control
An amplifier arrangement comprising first and second power amplifiers (T1, T2) having drains connected to positive and negative drive voltages, respectively, and gates connected to an input signal. The arrangement further comprises first and second current sensors (1, 2) for detecting first and second drain currents from the power amplifiers, processing circuitry (3) adapted to identify the smallest drain current, and a feedback control loop (5) and means for driving a bias current dependent on a feedback signal through a resistor connected between the input signal and the gate of an inactive one of the first and second power amplifiers. The control loop will keep the idle current constant in the transistor with the lowest current (the inactive transistor). Thereby, the current running in the transistor which does not deliver current to the load will be fixed at a desired value.
Electronic preamplifier system
A graphene microphone preamplifier is a minimalist design working in class A with large quiescent current in a push-pull configuration, with automatic balancing of voltage imbalance.
Electronic Preamplifier System
A graphene microphone preamplifier is a minimalist design working in class A with large quiescent current in a push-pull configuration, with automatic balancing of voltage imbalance.