Patent classifications
H03F3/3028
Electronic device for a radiofrequency signal reception chain, comprising a low-noise transimpedance amplifier stage
An electronic device includes a transimpedance amplifier stage having an amplifier end stage of the class AB type and a preamplifier stage coupled between an output of a frequency transposition stage and an input of the amplifier end stage. A self-biased common-mode control stage is configured to bias the preamplifier stage. The preamplifier stage is formed by a differential amplifier with an active load that is biased in response to the self-biased common-mode control stage.
Wide frequency/voltage-ratio buffer with adaptive power consumption
Certain aspects of the present disclosure provide methods and apparatus (e.g., a level shifter) for buffering an oscillating signal generated by an oscillator. One example apparatus generally includes an amplifier having a first amplification stage configured to amplify the oscillating signal generated by the oscillator and a second amplification stage configured to amplify an inverse of the oscillating signal generated by the oscillator; and a sensing circuit configured to adjust an operational bandwidth of the amplifier based on a frequency of the oscillating signal.
WIDE FREQUENCY/VOLTAGE-RATIO BUFFER WITH ADAPTIVE POWER CONSUMPTION
Certain aspects of the present disclosure provide methods and apparatus (e.g., a level shifter) for buffering an oscillating signal generated by an oscillator. One example apparatus generally includes an amplifier having a first amplification stage configured to amplify the oscillating signal generated by the oscillator and a second amplification stage configured to amplify an inverse of the oscillating signal generated by the oscillator; and a sensing circuit configured to adjust an operational bandwidth of the amplifier based on a frequency of the oscillating signal.
High Efficiency Ultra-Wideband Amplifier
An amplifier comprising an active device having an output terminal for driving a load impedance in response to a signal applied to an input terminal and a current source connected to the active device to provide a bias to the active device wherein when the active device is operated an output power of the active device increases with increasing load impedance.
UNIT AMPLIFICATION CIRCUIT, AMPLIFIER AND RECEIVING CIRCUIT
A unit amplification circuit includes a push-pull circuit having a transistor with a gate connected to an input terminal, a symmetrical circuit connected symmetrically to the push-pull circuit and configured to be turned off in a first operation mode and turned on in a second operation mode, and a path control circuit connected to a drain of the transistor and configured to connect the drain and an output terminal in the first operation mode and to disconnect the drain and the output terminal in the second operation mode.
POWER AMPLIFIER HAVING STACK STRUCTURE
A power amplifier having a stack structure comprises a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal; a second driver stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; and a power stage that has a power input terminal connected with a ground terminal of the first driver stage and a ground terminal of the second driver stage and receives a virtual ground voltage, and has an input terminal connected with an output terminal of the second driver stage and receives and amplifies an output signal from the second driver stage.
OPERATIONAL AMPLIFIER CIRCUIT AND BIAS CURRENT SUPPLY METHOD
Bias current is supplied to a first differential pair and a second differential pair from a first transistor being a single current source. Bias current is supplied to a third differential pair and a fourth differential pair from a second transistor being a single current source. An input voltage is at a power supply potential, and an input voltage is at a ground potential. When the second differential pair and the third differential pair are turned OFF, the bias current supplied from the first transistor flows to an output stage via the first differential pair, and the bias current supplied from the second transistor flows to the output stage via the fourth differential pair. Therefore, when the second differential pair and the third differential pair are turned OFF, a circuit current is kept constant, and a fluctuation in a frequency characteristic can be restrained.
Multi-mode bias modulator and envelope tracking power amplifier using the same
An envelope tracking power amplifier is disclosed herein. The envelope tracking power amplifier includes a multi-mode bias modulator and a power amplifier. The multi-mode bias modulator generates an envelope-modulated bias voltage from the envelope signal of an radio frequency (RF) signal whose power is to be amplified by using a linear amplifier and a switching amplifier each having varying current driving capability in response to an operation mode control signal that determines any one of low-level mode and high-level mode. The power amplifier is biased in response to the envelope-modulated bias voltage, amplifies the RF signal, and outputs the amplified RF signal to an antenna.
TRANS-IMPEDANCE AMPLIFIER WITH REPLICA GAIN CONTROL
This disclosure relates to the field of amplifiers for multi-level optical communication and more particularly to techniques for trans-impedance amplifiers (TIA) with gain control. The claimed embodiments address the problem of implementing a low cost TIA that exhibits high linearity, low noise, low power, and wide bandwidth. More specifically, some claims are directed to approaches for providing TIA gain control using a plurality of inverter-based replica gain control cells controlled by a feedback loop to manage the current into the amplifying output stage and thereby the TIA output voltage.
Power amplifier system
Disclosed is a power amplifier system having a main amplifier with an input coupled to a main radio frequency (RF) input and an output connected to a main RF output, wherein the main amplifier exhibits a nonlinear gain characteristic with compression. At least one compression compensating amplifier has a signal input coupled to the common RF input and a signal output coupled to the common RF output.