Patent classifications
H03G3/3042
Overvoltage protection and gain bootstrap circuit of power amplifier
An overvoltage protection and gain bootstrap circuit of a power amplifier includes a power amplification transistor, and a diode reversely connected with a gate of the power amplification transistor. A negative electrode of the diode is connected with the gate of the power transistor, and a positive electrode of the diode is connected with a constant voltage source, such that a function of overvoltage protection and gain bootstrap of the circuit is realized by controlling a turn-on state of the diode. By adding a diode device to the circuit, gate-drain overvoltage protection for the power amplification transistor can be provided, and the gain of the amplifier can be improved before power compression, thereby improving linearity of the power amplifier. The structure of the circuit can be simple, with reduced occupied area hardware cost.
POWER AMPLIFIER WITH PROTECTION LOOP
A power amplifier includes an over-current protection loop and/or an over-voltage protection loop to assist in preventing operation outside a safe operation zone. In a further exemplary aspect, triggering of the over-current protection loop adjusts a threshold voltage for the over-voltage protection loop. In further exemplary aspects, the over-current protection loop may adjust not only a bias regulator, but also provide an auxiliary control signal that further limits signals reaching the power amplifier. In still further exemplary aspects, the over-voltage protection loop may operate independently of the over-current protection current loop or the over-voltage protection loop contribute to an over-current protection signal.
Transmission power control method of base station in OFDMA-based wireless communication system
A power control method of a base station in a wireless communication system based on Orthogonal Frequency Division Multiple Access (OFDMA) is provided for reducing power consumption by turning off the bias of the power amplifier for the duration of a symbol carrying no user data. The method includes checking scheduling information of radio resources, detecting a symbol carrying no user data, based on the scheduling information, and turning off a bias of the power amplifier for a symbol duration of the symbol carrying no user data. The transmission power control method is capable of reducing power consumption of the base station by turning off the bias of the power amplifier of the base station for the symbol duration in which no user data is transmitted.
METHOD AND APPARATUS FOR PLAYING AUDIO, AND COMPUTER-READABLE STORAGE
The present application relates to the field of audio technology, and provides a method, a device, and an apparatus for playing audio, and a computer-readable storage medium. The method for playing audio includes: obtaining an ambient atmospheric pressure value and audio data to be played; obtaining multiple target frequency points contained in the audio data to be played when the ambient atmospheric pressure value meets a preset condition, and determining equal-loudness multiples corresponding to the target frequency points according to the ambient atmospheric pressure value and a preset calibration atmospheric pressure value; and sending the audio data to be played and the equal-loudness multiples of the target frequency points to a power amplifying module, such that the power amplifying module amplifies the audio data to be played according to the equal-loudness multiples corresponding to the target frequency points.
Selectively switchable wideband RF summer
A radio frequency (RF) summer circuit having a characteristic impedance Zo comprises first and second ports coupled by first and second resistances, respectively, to a junction. The circuit further comprises a series combination of a third resistance and a switch movable between open and closed positions and an amplifier having input and output terminals and operable in an off state and an on state wherein the series combination is coupled across the input and output terminals of the amplifier between the junction and a third port. The first resistance, second resistance, and the third resistance are all substantially equal to Z.sub.0/3. Further, when the switch is moved to the closed position and the amplifier is switched to the off state a passive mode of operation is implemented and when the switch is moved to the open position and the amplifier is switched to the on state an active mode of operation is implemented. The RF summer circuit develops a summed signal at the third port equal to a sum of signals at the first and second ports modified by one of first and second gain values.
Amplifier gain-tuning circuits and methods
Circuits and methods for improving the noise figure (NF) of an amplifier, particularly an LNA, in high-gain modes while improving the IIP3 of the amplifier in low-gain modes. The source of an amplifier common-source FET is coupled to circuit ground thorough a degeneration circuit comprising a two-port inductor and a bypass switch coupled in parallel with the inductor. A switched feedback circuit is coupled between the gate of the common-source FET and a feedback node in the amplifier output signal path. During a low gain mode, the inductor is entirely bypassed and the enabled feedback circuit lowers the input impedance of the common-source FET and reduces the gain of the amplifier circuit, essentially eliminating the need for a degeneration inductor. During a high gain mode, the source of the common-source FET is coupled to circuit ground through the inductor and the feedback circuit is disabled. Other gain modes are supported.
Time-adaptive RF hybrid filter structures
A digitally controlled analog filter device. The digitally controlled analog filter device includes one or more digitally controlled analog signal amplifiers. The digitally controlled analog signal amplifiers are configured to have a gain of the digitally controlled analog signal amplifiers controlled by digital signals. The digitally controlled analog filter device further includes one or more analog time delay circuits coupled to signal input nodes of the digitally controlled analog signal amplifiers. The analog time delay circuits are configured to implement an analog signal delay. The digitally controlled analog filter device further includes a digital closed loop control circuit coupled to the digitally controlled analog signal amplifiers to digitally control the gain of the digitally controlled analog signal amplifiers.
Bias Compensation Circuit of Amplifier
The present invention discloses a bias compensation circuit. The bias compensation circuit includes a detecting circuit, including a diode-connected transistor circuit, with a first end for receiving a first current, and a second end coupled to a first reference voltage end; and a first diode circuit, with a first end for receiving a second current, and a second end coupled to the first reference voltage end; wherein the detecting circuit provides a first voltage level according to the diode-connected transistor circuit, and provides a second voltage level according to the first diode circuit; a voltage-current converting circuit, coupled to the detecting circuit, for generating a first reference current according to the first voltage level and the second voltage level; and a bias circuit, coupled to the voltage-current converting circuit, for receiving the first reference current, to provide a bias voltage level according to the first reference current.
ERROR VALUE MAGNITUDE DETECTOR FOR WIRELESS TRANSMITTER
An amplifier of a transmitter includes an input that receives an input signal and generates an amplified signal at an output. A digital power meter is coupled to the input of the amplifier, generates an estimated amplified signal, and determines peak and average powers of the estimated amplified signal. An output power detector coupled to the output of the amplifier determines peak and average powers of the amplified signal. A controller coupled to the digital power meter and the output power detector determines an estimated crest factor based on the peak and average powers of the estimated amplified signal, an amplified crest factor based on the peak and average powers of the amplified signal, and an error vector magnitude based on the estimated and amplified crest factors. The controller, which is also coupled to the amplifier, then adjusts operation of the amplifier based on the error vector magnitude.
SYSTEM AND METHOD FOR POWER AMPLIFIER CONTROL IN A MILLIMETER WAVE COMMUNICATION SYSTEM
A system for power amplifier control includes a processor, a memory in communication with the processor, wherein the processor and the memory are configured to simultaneously provide input signal strength of each of a plurality of power amplifiers in a millimeter wave (mmW) phased array system, determine an average input signal strength of the plurality of power amplifiers based on the provided input signal strengths using an analog-to-digital converter (ADC), determine a voltage headroom for the plurality of power amplifiers based on the determined average input signal strength, estimate a power backoff value based on the voltage headroom, and determine a gain control value based on the estimated power backoff value.