An insulation layer formation method comprises: a first step in which a surface treatment is applied to a base material to form thereon a high-resistance layer having high electric resistivity; a second step in which metal plating parts are formed on the base material that has undergone the first step in such a manner as to allow a high-resistance layer to be formed thereon; and a third process in which a high-resistance layer is formed on the base material that has undergone the second step.

A metal-core printed circuit board (MCPCB) and method of generating an ultra-narrow, high-current pulse driver with a MCPCB is provided. The MCPCB includes a rigid, metal heat sink layer and at least one electrically conductive top layer. At least one electrically insulating dielectric layer is positioned between the conductive top layer and rigid, metal heat sink layer, wherein the dielectric layer has a thickness of less than 0.007 inches.

A wiring substrate includes: an insulating substrate comprising a principal face; a wiring line located on the principal face; and a protruding portion on a side of the wiring line, the protruding portion being smaller in thickness than the wiring line and protrudes from the side along the principal face.

A light-emitting diode (LED) package includes a package substrate, an LED chip disposed on a first surface of the package substrate, and a first external connection pad and a second external connection pad disposed on a second surface of the package substrate opposite the first surface. The first external connection pad includes a first side, a second side, a third side and a fourth side, the first side being parallel to the second side, and the third side being parallel to the fourth side. The first side is spaced farther from a center of the package substrate than the second side. A length of the first side is shorter than a length of the second side.

A printed circuit board includes a first insulating layer, a first conductor-pattern layer disposed on one surface of the first insulating layer, a first recess formed in the other surface of the first insulating layer opposing one surface of the first insulating layer, a second conductor-pattern layer disposed in the first recess, and a first metal post penetrating the first insulating layer, connecting the first and second conductor-pattern layers to each other, and having one end exposed to a bottom surface of the first recess, wherein the second conductor-pattern layer includes a seed layer disposed on at least a portion of each of a surface of one end of the first metal post exposed to the bottom surface of the first recess and an internal surface of the first recess including the bottom surface of the first recess, and a plating layer disposed on the seed layer to fill at least a portion of the first recess.

A method for producing a wired circuit board including a stainless steel supporting layer having a stainless steel terminal includes a first step of preparing the stainless steel supporting layer having a passive film formed on the surface thereof and a second step of forming a first gold plating layer on the surface of the stainless steel terminal. In the second step, the stainless steel supporting layer is immersed in a first gold plating solution containing a weak acid and a gold compound without containing a strong acid, and electricity is supplied to the stainless steel supporting layer so that the passive film is removed and the first gold plating layer is formed on the surface of the stainless steel terminal.

A ceramic circuit board includes a ceramic substrate and metal layers provided to both surfaces of the ceramic substrate and containing Al and/or Cu, wherein a measurement value α1 of a linear thermal expansion coefficient at 25° C. to 150° C. is 5×10.sup.−6 to 9×10.sup.−6/K, a ratio α1/α2 of the α1 to a theoretical value α2 of the linear thermal expansion coefficient at 25° C. to 150° C. is 0.7 to 0.95, and at least one of the metal layers forms a metal circuit.

The present invention relates to a circuit substrate arrangement comprising a base layer (2) made from aluminium, a circuit layer (3) made from copper, a dielectric layer (4) arranged between the base layer (2) and the circuit layer (3), an opening (5) passing through the base layer (2), the circuit layer (3) and the dielectric layer (4) and an electrical contact (6) between the base layer (2) and the circuit layer (3), wherein the electrical contact (6) comprises a rivet (7), wherein a frictionally connected joint (8) is formed between the rivet (7) and the base layer (2) and wherein an integrally bonded joint (9) is formed between the rivet (7) and the circuit layer (3).

A wiring substrate includes: an insulating substrate comprising a principal face; a wiring line located on the principal face; and a protruding portion on a side of the wiring line, the protruding portion being smaller in thickness than the wiring line and protrudes from the side along the principal face.

A semiconductor device including an insulated circuit board. The insulated circuit board includes an insulating board having an outer edge and a plurality of corners, and a plurality of circuit patterns formed on a front surface of the insulating board. The plurality of circuit patterns have a plurality of outer-edge corners facing the outer edge of the insulating board, among which outer-edge corners corresponding to the corners of the insulating board are smaller in curvature than outer-edge corners that do not correspond to the corners of the insulating board.