Patent classifications
H05K2201/0382
SURFACE TREATED COPPER FOIL, LAMINATE USING THE SAME, COPPER FOIL WITH CARRIER, PRINTED WIRING BOARD, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD
The invention provides a surface treated copper foil with which transmission loss is favorably suppressed even if the surface treated copper foil is used for a high frequency circuit board.
A surface treated copper foil has a surface treated layer formed on at least one surface, the total deposition amount of Co, Ni, and Mo is 1000 g/dm.sup.2 or less in the surface treated layer, the surface treated layer includes a particle having three or more projections, the number of the particles per m.sup.2 in the surface treated layer is 0.4 or more, and the surface roughness Rz on a side of the surface treated layer measured by a contact type roughness meter is 1.3 m or less.
High current switch
A high current switch, in particular for a motor vehicle, having a first bus bar, a second bus bar in addition to a first semi-conductor switch that has a control connection and a first transmission connection as well as a second transmission connection. The first transmission connection is placed in direct contact with the first bus bar and the second transmission connection is placed in direct electric contact with the second bus bar.
Method of preparing metal pattern having 3D structure
The present application relates to a method of preparing a metal pattern having a 3D structure, a metal pattern laminate, and use of the metal pattern laminate. According to the method of preparing a metal pattern, the metal pattern having a 3D structure can be effectively formed on a receptor. Especially, the metal pattern having a 3D structure can also be effectively and rapidly transferred to a surface of the receptor, such as, a flexible substrate, to which the metal pattern is not easily transferred. The metal pattern laminate prepared using the method can, for example, be usefully used for metal layers of flexible electronic devices or metal interconnection lines.
Robust multi-layer wiring elements and assemblies with embedded microelectronic elements
An interconnect element 130 can include a dielectric layer 116 having a top face 116b and a bottom face 116a remote from the top face, a first metal layer defining a plane extending along the bottom face and a second metal layer extending along the top face. One of the first or second metal layers, or both, can include a plurality of conductive traces 132, 134. A plurality of conductive protrusions 112 can extend upwardly from the plane defined by the first metal layer 102 through the dielectric layer 116. The conductive protrusions 112 can have top surfaces 126 at a first height 115 above the first metal layer 132 which may be more than 50% of a height of the dielectric layer. A plurality of conductive vias 128 can extend from the top surfaces 126 of the protrusions 112 to connect the protrusions 112 with the second metal layer.
Contact structure and contact device, and electronic device including the same
An electronic device may include a housing a housing comprising a first surface and an second surface generally parallel to the first surface, the second surface including an opening extending to the first surface, the first and second surface being spaced apart from one another along an axis; a first conductive member being coupled to the first surface; a second conductive member spaced apart substantially from the first conductive member along the axis; and a conductive dome structure disposed between at least a part of the first conductive member and at least a part of the second conductive member and forming an electric path between the first conductive member and the second conductive member.
Multilayer wiring substrate, manufacturing method therefor, and substrate for probe card
A multilayer wiring substrate that can realize a higher-density wiring structure is obtained. Provided is a multilayer wiring substrate, where a multilayer body including a first insulating layer and a second insulating layer stacked on the bottom surface of the first insulating layer includes printed wiring electrodes; the printed wiring electrodes are formed by printing with and sintering conductive paste; the printed wiring electrodes respectively include first wiring electrode portions located on the second insulating layer and second wiring electrode portions respectively joined to first wiring electrode portions; and the second wiring electrode portions respectively extend into through holes and, further, are exposed at the top surface of the first insulating layer.
Image pickup apparatus and image pickup apparatus manufacturing method
An image pickup apparatus is configured with an image pickup device on which a plurality of bumps are arranged in line on an outer circumferential portion of a light receiving surface; and a flexible wiring board including a plurality of inner leads each of which is configured with a distal end portion, a bending portion and a rear end portion, the distal end portion being compression-bonded to a bump, and the rear end portion being arranged parallel to a side face of the image pickup device with the bending portion interposed between the distal end portion and the rear end portion. A height of a light receiving portion side of the bumps is lower than a height of a side face side; and each of the inner leads is plastically transformed according to a shape of a top face of the bumps.
CIRCUIT ASSEMBLY, ELECTRICAL JUNCTION BOX, AND MANUFACTURING METHOD FOR CIRCUIT ASSEMBLY
A circuit assembly includes a circuit board having an insulating board in which a conductive path is formed on an insulating plate and a plurality of busbars that are bonded to one side of the insulating board, an insulating layer that is printed to the plurality of busbars so as to couple adjacent ones of the plurality of busbars to each other, a heat dissipation member on which the insulating layer is placed and which is configured to dissipate heat conducted from the insulating layer, a fixing member that is configured to fix the circuit board and the heat dissipation member to each other in a state in which the insulating layer is sandwiched between the heat dissipation member and the plurality of busbars.
METHOD FOR PRODUCING WIRED CIRCUIT BOARD
A method includes the following steps: S1, providing the insulating layer having an inclined face; S4, disposing a photomask so that in the photoresist, first and second exposure portions are exposed to light, and exposing the photoresist is to light through the photomask; S5, removing the first and the second exposure portions of the photoresist. On the assumption that in S4, light reflected at the metal thin film is focused between the first and the second exposure portions of the photoresist, the inclined face has a bending portion bending in one direction, the portion removed in S5 in the photoresist due to light focus being continuous with the first and the second exposure portions. The second exposure portion includes continuously an avoidance portion that avoids the bending portion and an overlapping portion that overlaps with at least a portion other than the bending portion in the inclined face.
Electronic device and method for manufacturing the same
An electronic device according to the present disclosure includes a component, an electrode placed on the component, a conductor which includes a first conductor section, including an electrode contact surface in contact with the electrode, and two second conductor sections, electrically connected to two respective facing edges of the first conductor section to extend in respective directions away from the electrode and including respective inclined surfaces inclined in directions toward a central axis passing through a center of the electrode and perpendicular to the surface of the electrode, an insulator which is in contact with the two second conductor sections from sides opposite to the central axis and encloses the conductor and the electrode, and a case housing the component, the electrode, the conductor, and the insulator. A space without the insulator is defined between the two second conductor sections.