A wiring circuit board includes a metal supporting board; an insulating layer; and a conductive layer in this order in a thickness direction. The conductive layer includes a terminal portion, and a tail line portion extending from the terminal portion. The terminal portion has a via portion that penetrates the insulating layer in the thickness direction and is connected to the metal supporting board. The tail line portion has a base end portion that has a width different from a width of the terminal portion in a direction orthogonal to the extending direction of the tail line portion and that is connected with the terminal portion; and a second via portion that penetrates the insulating layer in the thickness direction and that is connected to the metal supporting board.

A method of manufacturing, a carrier, and a semiconductor package are provided. The method involves depositing a plurality of conductive vias, applying a molding material over the lead frame, grinding the molding material to expose the plurality of conductive vias, and depositing a metalized pattern over the molding material. The carrier is manufacture by this method and the semiconductor package is formed based on the carrier.

A component carrier includes component carrier material and a heat spreading module with a carbon structure enclosed within a dielectric shell for disabling contact between the carbon structure and the component carrier material.

A single layer capacitor can include a substrate having a first surface and a second surface opposite the first surface. A resistive layer can be formed over at least a portion of the first surface of the substrate. A first conductive layer can be formed over at least a portion of the resistive layer. A second conductive layer can be formed over at least a portion of the second surface of the substrate. As such, the single layer capacitor can include a resistor and a capacitor formed in series with one another.

A component carrier includes component carrier material and a heat spreading module with a carbon structure enclosed within a dielectric shell for disabling contact between the carbon structure and the component carrier material.

Various configurations of a grounding element or conductive element for a printed circuit board (PCB), as well as a process for manufacturing, are disclosed. For example, a PCB can include a solder grounding element connecting a copper track to a metal substrate, where the solder grounding element is applied via ultrasonic soldering during a manufacturing process. In another example, a PCB can include a spring pin grounding element connecting a copper track to a metal substrate. In yet another example, a PCB can include an auto splice grounding element connecting a copper track to a metal substrate. In yet another example, a PCB can include a press fit pin grounding element connecting a copper track to a metal substrate. In yet another example, a PCB can include a clip pin grounding element connecting a copper track to a metal substrate.

A method of manufacturing, a carrier, and a semiconductor package are provided. The method involves depositing a plurality of conductive vias, applying a molding material over the lead frame, grinding the molding material to expose the plurality of conductive vias, and depositing a metalized pattern over the molding material. The carrier is manufacture by this method and the semiconductor package is formed based on the carrier.

A wiring board assembly (1) includes: a flexible printed wiring board (2) which includes at least an insulating substrate (5) including a through-hole (53), and wiring patterns (61) and (62) provided on the insulating substrate (5) and extending to peripheral edge portions (531n) and (532n) of the through-hole (53); a metal reinforcing plate (3) attached to the flexible printed wiring board (2) and facing the through-hole (53); and a solder connection portion (4) covering an inner wall surface (534) of the through-hole (53) and electrically connecting the wiring patterns (61) and (62) to the metal reinforcing plate (3).

A single layer capacitor can include a substrate having a first surface and a second surface opposite the first surface. A resistive layer can be formed over at least a portion of the first surface of the substrate. A first conductive layer can be formed over at least a portion of the resistive layer. A second conductive layer can be formed over at least a portion of the second surface of the substrate. As such, the single layer capacitor can include a resistor and a capacitor formed in series with one another.

A printed circuit board is provided which comprises a core layer of a conductive metal having a thickness between 30 micrometer and 120 micrometer, an upper dielectric layer and a lower dielectric layer sandwiching the core layer; an upper conductive layer arranged above the upper dielectric layer and a lower conductive layer arranged below the lower dielectric layer; at least one via passing from the upper conductive layer to the lower conductive layer and filled at least partially with the dielectric material of the upper and/or lower dielectric layer; and at least one and blind via, connecting the upper conductive layer with the core layer.