An electronic device with high density for component arrangement includes a first substrate, a second substrate, a plural of passages formed through the first and the second substrates, a first contact arranged on the first face of the first substrate to conceal the corresponding one of the passages, a second contact arranged on the second substrate and adjacent to the corresponding one of the passages, and a conductor disposed in the passages. A first end of the conductor electrically connects the first contact, while a second end of the conductor electrically connects the second contact.

Embodiments described herein may be related to apparatuses, processes, and techniques directed to embedding capacitors in through glass vias within a glass core of a substrate. In embodiments, the through glass vias may extend entirely from a first side of the glass core to a second side of the glass core opposite the first side. Layers of electrically conductive material and dielectric material may then be deposited within the through glass via to form a capacitor. the capacitor may then be electrically coupled with electrical routings on buildup layers on either side of the glass core. Other embodiments may be described and/or claimed.

A wiring board includes: a wiring layer; an insulating layer laminated on the wiring layer; an opening portion penetrating through the insulating layer to the wiring layer; a recess portion formed in a surface of the wiring layer exposed from the opening portion of the insulating layer; and a conductor film formed in the opening portion of the insulating layer and the recess portion of the wiring layer, wherein the recess portion of the wiring layer includes a raised portion, which is raised higher than an outer peripheral portion of a bottom surface, at a central portion of the bottom surface.

The invention discloses a method of improving a wire structure of a circuit board, comprising the following steps: providing a multi-layer circuit board, including an inner circuit and a surface circuit; forming an opening to expose the inner circuit; forming a first circuit layer in the opening; removing the first circuit layer, the first conductive circuit, and the surface circuit on the multi-layer circuit board and removing a part of the first circuit layer in the opening; forming an adhesion promoter layer in the opening and on the multi-layer circuit board; forming a second conductive circuit on the adhesion promoter layer and on the first conductive circuit layer in the opening; forming a photoresist layer on the second conductive circuit layer; forming a second circuit layer in the opening and on the multi-layer circuit board, and removing the photoresist layer and a part of the second conductive circuit.

A method of manufacturing a component carrier includes laser drilling a blind hole in a layer stack, and subsequently extending the blind hole to a through hole by etching. A component carrier includes an electrically insulating layer structure, an electrically conductive layer structure directly on an electrically insulating layer structure, and a tapering through hole extending through the electrically conductive layer structure and through the electrically insulating layer structure with a lateral overhang of the electrically conductive layer structure beyond the electrically insulating layer structure at the tapering through hole of not more than 20% of a maximum diameter of the tapering through hole.

A component carrier includes an electrically insulating layer structure having a first main surface and a second main surface with a through hole extending through the electrically insulating layer structure between the first main surface and the second main surface. An electrically conductive bridge structure connects opposing sidewalls of the electrically insulating layer structure delimiting the through hole. A vertical thickness of the electrically insulating layer structure is not more than 200 μm and a narrowest vertical thickness of the bridge structure is at least 20 μm.

A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer and including a signal wiring, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer. The resin insulating layer has an opening such that the opening is exposing a portion of the first conductor layer and that the via conductor is formed in the opening of the resin insulating layer, and the resin insulating layer includes inorganic particles and resin such that the resin is forming the surface of the resin insulating layer.

A printed circuit board, on which at least one light emitting diode including at least two electrodes is mounted, includes a base member, an insulating layer disposed on the base member, a plurality of conductive pads disposed on the insulating layer and electrically connected to the light emitting diode, a plurality of via holes formed through at least one conductive pad of the plurality of conductive pads and at least a portion of each insulating layer, and filling members disposed in the plurality of via holes to electrically connect the base member to the at least one conductive pad, A distance between the plurality of via holes is ‘n’ times greater than a depth of at least one via hole of the plurality of via holes, in which ‘n’ is a positive integer greater than ‘1’ and less than ‘10’.

A component-embedded substrate includes: insulating layers each including a wiring pattern; an embedded component including a connection terminal; a plurality of vias that electrically connect the connection terminal to the wiring patterns adjacent to each other in a lamination direction. Each of the vias is composed of a via hole in the insulating layer and a conductive material in the via hole. One of the vias is a connection via connected to the connection terminal, and another of the vias is an adjacent via adjacent to the connection via in the lamination direction. The connection via and adjacent via overlap in a plan view. S1/A1≤0.61 and S1/A2≤0.61 are satisfied, where A1 is an average cross-sectional area of the connection via, A2 is an average cross-sectional area of the adjacent via, and S1 is an overlapping area of the connection via and adjacent via in the plan view.

Electromagnetic circuit structures and methods are provided for a circuit board that includes a hole disposed through a substrate to provide access to an electrical component, such as a signal trace line (or stripline), that is at least partially encapsulated (e.g., sandwiched) between substrates. The electrical component includes a portion substantially aligned with the hole, and an electrical conductor is disposed within the hole. The electrical conductor is soldered to the portion of the electrical component.