A circuit board includes a baseboard, a first conductive circuit layer, a second conductive circuit layer, at least one through hole, and a number of conductive lines. The first conductive circuit layer includes a number of first conductive circuit lines formed on a first side of the baseboard. The second conductive circuit layer includes a number of second conductive circuit lines formed on a second side of the baseboard. The through hole is defined through the first conductive circuit layer, the baseboard, and the second conductive circuit layer. The number of conductive lines are formed in an inner wall of the through hole and spaced apart around the through hole. Each conductive line electrically couples one of the first conductive circuit lines to a corresponding one of the second conductive circuit lines.

A connection structure between a flat cable and an electronic circuit board includes an electronic circuit board; a cable connection hole formed to penetrate the electronic circuit board; a plurality of internal contacts provided on an inner surface of the cable connection hole; and a flat cable provided with a plurality of contacts which correspond to the plurality of internal contacts of the cable connection hole and are exposed to one side surface of the flat cable. When one end of the flat cable is inserted into the cable connection hole of the electronic circuit board, the plurality of contacts of the flat cable are in contact with the plurality of internal contacts of the cable connection hole, respectively.

A method of manufacturing a circuit substrate including forming, in an insulating substrate and circuit patterns that are provided on a first surface and a second surface of the insulating substrate, a through-hole penetrating the insulating substrate and the circuit patterns, where the circuit patterns contain Cu as a main component. The method including filling, in the through-hole, an electrically conductive paste that is a melting-point shift electrically conductive paste including SnBi solder powder, Cu powder, and resin, and forming a protrusion obtained by causing the electrically conductive paste to protrude from the through-hole. The method further including performing pressure treatment on the protrusion near the through-hole; and performing heat treatment on the insulating substrate whose protrusion is subjected to the pressure treatment and causing the circuit patterns and the electrically conductive paste to be electrically connected with each other.

A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.

A process includes utilizing a pin array that includes multiple segmented pins for forming selectively plated through holes. The process includes forming a PCB laminate structure that includes multiple spinel-doped core layers and multiple through holes. Each spinel-doped core layer includes a heat-activated spinel material incorporated into a dielectric material. The process includes aligning individual segmented pins of a pin array with corresponding through holes of the PCB laminate structure, where each segmented pin includes heated segment(s) and insulating segment(s). The process includes inserting the segmented pins of the pin array into the corresponding through holes and generating heat within each heated pin segment that is sufficient to form metal nuclei sites in selected regions of the spinel-doped core layers adjacent to portions of the through holes that contain the heated pin segments. The metal nuclei sites function as seed layers to enable formation of selectively plated through holes.

A multilayer printed circuit board is provided having a first conductive layer and a first plating resist selectively positioned within the first conductive layer. A second plating resist may be selectively positioned within a second conductive layer. A through hole extends through the first plating resist in the first conductive layer and the second plating resist in the second conductive layer. An interior surface of the through hole is plated with a conductive material except along a length between the first plating resist and the second plating resist. This forms a partitioned plated through hole having a first via segment electrically isolated from a second via segment.

The present invention provides a process and a structure of forming conductive vias using a light guide. In an exemplary embodiment, the process includes providing a via in a base material in a direction perpendicular to a plane of the base material, applying a photoresist layer to an interior surface of the via, inserting a light guide into the via, exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer, removing a portion of the photoresist layer, and plating an area of the via, where the photoresist has been removed, with a metal, thereby resulting in a portion of the via plated with metal and a portion of the via not plated with metal.

A printed wiring board includes a main substrate and a rising substrate. A support portion of the rising substrate is inserted into a slit in the main substrate. In a direction in which a plurality of first electrodes are aligned, a width of each of the plurality of first electrodes is larger than a width of each of a plurality of second electrodes, and the width of each of the plurality of second electrodes is arranged to fit within the width of each of the plurality of first electrodes.

An embedded component structure including a circuit board, an electronic component, a dielectric layer and a connection circuit layer and a manufacturing method thereof is provided. The circuit board has a through hole and includes a core layer, a first circuit layer, and a second circuit layer. The first circuit layer and the second circuit layer are disposed on the core layer. The through hole penetrates the first circuit layer and the core layer. The electronic component including a plurality of connection pads is disposed within the through hole where the dielectric layer is filled in. The Young's modulus of the core layer is greater than the Young's modulus of the dielectric layer. The connection circuit layer covers and contacts a first electrical connection surface of the first circuit layer and at least one of a second electrical connection surface of each of the connection pads. A manufacturing method of an embedded component structure is also provided.

The present invention provides a process and a structure of forming conductive vias using a light guide. In an exemplary embodiment, the process includes providing a via in a base material in a direction perpendicular to a plane of the base material, applying a photoresist layer to an interior surface of the via, inserting a light guide into the via, exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer, removing a portion of the photoresist layer, and plating an area of the via, where the photoresist has been removed, with a metal, thereby resulting in a portion of the via plated with metal and a portion of the via not plated with metal.