A terminal substrate includes a signal terminal disposed on a terminal surface of an insulation ceramic layer. An insulation resin layer of a flexible substrate includes a first surface facing the terminal surface, and a second surface on an opposite side of the first surface. A first signal pad disposed on the first surface is joined to the signal terminal. A first penetration conductive part penetrates the insulation resin layer from the first signal pad. A first signal line is disposed on the second surface. A second penetration conductive part penetrates the insulation resin layer from the first signal line. A second signal line is disposed on the first surface. A third penetration conductive part penetrates the insulation resin layer from the second signal line. A second signal pad is disposed on the second surface.

A multilayer structure having a main surface includes: a first conductor extending in parallel with the main surface; a second conductor extending in parallel with the main surface and disposed at a different position from the first conductor with respect to a thickness direction of the multilayer structure; and a third conductor having a shape extending in at least any direction as seen in a direction perpendicular to the main surface. In a range higher than a lower end of the third conductor and lower than an upper end of the third conductor in the thickness direction of the multilayer structure, at least a part of the first conductor is included and at least a part of the second conductor is included.

In accordance with at least one aspect of this disclosure, a system can include, a printed circuit board (PCB), a controller on the PCB configured to output a gate drive signal to one or more gate drivers 106 to drive a gate 108 of a switch (e.g., a transistor), and an isolation domain. The isolation domain can be defined in the PCB between the controller and the one or more gate drivers. More specifically, the isolation domain can begin at a first moat and end at a second moat, defined between the controller and the one or more gate drivers. The isolation domain can be configured to prevent common mode noise in the gate drive signal.

In an embodiment a carrier includes a base substrate, at least one insulating layer, at least one inner wiring layer, at least one outer wiring layer and at least one through-via in the insulating layer extending through the insulating layer, wherein the base substrate and the insulating layer are formed from different materials, wherein the base substrate is formed for mechanically stabilizing the carrier and supports the insulating layer, wherein the inner wiring layer is arranged in a vertical direction at least in places between the base substrate and the insulating layer, wherein the outer wiring layer is spatially separated from the inner wiring layer at least in places by the insulating layer, and wherein the through-via electrically conductively connects the inner wiring layer to the outer wiring layer and has a lateral cross-section having a maximum lateral extent of at most 100 μm.

The present invention supplies electric power to a semiconductor module appropriately and also curbs the number of wiring layers of a main substrate on which the semiconductor module is mounted. A semiconductor device (10) is provided with a main substrate (90) and a semiconductor module (1). A first power supply circuit (71), the semiconductor module (1), and a first element (9) are mounted on the main substrate (90). The semiconductor module (1) is provided with a second element (2, 3) and a module substrate (4) on which the second element (2, 3) is mounted. The first power supply circuit (71) supplies electric power (Vcc) to the first element (9). The semiconductor module (1) is further provided with a second power supply circuit (72) mounted on the module substrate (4), and the second power supply circuit (72) supplies electric power (Vcc) to the second element (2, 3).

A stretchable sensing structure includes a stretchable sensing array, signal transmission lines, and a signal processing element. The stretchable sensing array includes at least two first sensing electrodes arranged in an array. The first sensing electrodes sense different physiological signals. Each first sensing electrode includes a first stretchable substrate layer, a pre-stretched pattern layer formed on the first stretchable substrate layer, and an electrode sheet formed on the first stretchable substrate layer and in electrical contact with the pre-stretched pattern layer. A material of the electrode sheet is carbon paste. The first sensing electrode senses different physiological signals. Two adjacent first sensing electrodes are electrically connected through the signal transmission line. The first sensing electrode is electrically connected to the signal processing element through the signal transmission line.

An integrated circuit package includes a substrate with traces for high speed communication that are subject to crosstalk. The traces include overlapping pads on different layers of the substrate, which can increase the mutual capacitance of the signal lines, which will offset the mutual inductance. Thus, the overlapping pads can reduce the crosstalk between the signal traces.

A component carrier includes a stack with at least one electrically insulating layer structure and electrically conductive layer structures some of which have a first density of trace structures and a second density of connection structures, and a further stack with at least one further electrically insulating layer structure and further electrically conductive layer structures some of which have a third density of further trace structures and a fourth density of further connection structures. A first component is applied to the stack and a second component is embedded in the further stack. The connection structures are respectively connected to the further connection structures. The first density of trace structures is lower than the third density of further trace structures. The stack and the further stack are connected with each other by the connection structures and by the further connection structures. The first component is connected to the second component.

A printed circuit board (PCB) may include a signal layer having a functional region and a PCB signal layer testing region. The PCB signal layer testing region may include a first differential pair having a first length formed on the signal layer, a second differential pair having a second length, different than the first length, formed on the signal layer and a third differential pair having a third length, different than the first length and different than the second length, formed on the signal layer.

A device may include a substrate having a first surface and a second surface, a first conductive terminal disposed over the first surface, a second conductive terminal spaced apart from the first conductive terminal in a first direction and disposed over the first surface, a first conductive auxiliary pattern disposed below the first conductive terminal and overlapping with the first conductive terminal, the first conductive auxiliary pattern being coupled to the second conductive terminal, and a second conductive auxiliary pattern disposed below the second conductive terminal and overlapping with the second conducive terminal, the second conductive auxiliary pattern being coupled to the first conductive terminal.