H05K2201/0979

THROUGH HOLE ARRAYS FOR FLEXIBLE LAYER INTERCONNECTS

Disclosed is an integrated circuit arrangement including a two sided circuit board, having a first surface and a second surface. A plurality of electrical conductors is incorporated as part of the two sided circuit board. An array of through holes extend through the first surface and the second surface, arranged in a pattern and are configured to provide a common electrical connection area, wherein the common electrical connection area is associated with a portion of a particular one of the plurality of electrical conductors.

IMPEDANCE MATCHING STRUCTURE OF TRANSMISSION LINE
20170324391 · 2017-11-09 ·

An impedance matching structure is disposed on a circuit board for matching an impedance of a transmission line for transmitting an electronic signal. The structure includes: at least two redundant conducting sections coupled to different points between an input terminal and an output terminal of the transmission line, wherein the redundant conducting sections are apart from one another, and a first terminal of each of the redundant conducting sections is coupled to the transmission line, while a second terminal of each of the redundant conducting sections is apart from the transmission line; and at least one grounded conducting section, each of which corresponds to one of the redundant conducting sections, and surrounds in separation from the corresponding redundant conducting section, wherein each of the at least two redundant conducting sections is disposed in a corresponding plating hole.

Shared resistor pad bypass

The electrical circuit can include a line circuit portion having a number of shared resistor pads, where each shared resistor pad is electrically coupled to an electrically conductive line lead, where the electrically conductive line lead carries a voltage capable of operating an electrical load. The electrical circuit can also include a load circuit portion comprising a number of unshared resistor pads. The electrical circuit can further include at least one zero ohm resistor electrically coupled to at least one shared resistor pad. The at least one zero ohm resistor can be configurable after manufacturing the printed circuit board. The load circuit portion can be electrically isolated from the line circuit portion in the absence of the at least one zero ohm resistor being further electrically coupled to at least one unshared resistor pad.

Printed wiring

In printed wiring that is formed, on a surface of a base member. by a film of cured electrically conductive ink and that includes: a wavy line; a first wiring element located at one side of both sides sandwiching the wavy line in a width direction; and a second wiring element located at the other side of the both sides and adjacently to the wavy line; a surplus wavy line is provided which is another wavy line, which extends along the wavy line adjacently to the wavy line between the wavy line and the first wiring element, and which is connected to the wavy line to have the same potential.

Communication module
11206731 · 2021-12-21 · ·

A communication module includes: a substrate; a supplementary substrate disposed to surround an electronic element mounted on a lower surface of the substrate; a molding material configured to seal an electronic element mounted on an upper surface of the substrate; and a shielding layer disposed on a side surface and an upper surface of the molding material, a side surface of the supplementary substrate, and a side surface of the substrate. The supplementary substrate includes: a plurality of first pads disposed on an upper surface of the supplementary substrate; a plurality of second pads disposed on a lower surface of the supplementary substrate; a plurality of vias connecting the plurality first pads to the plurality of second pads; and a ground pad disposed on the side surface of the supplementary substrate. The ground pad includes an extender connected to a corresponding first pad and a corresponding second pad.

Conductor arrangement and production method
11195639 · 2021-12-07 ·

The present disclosure provides a conductor arrangement for transmitting differential communication signals, the conductor arrangement includes a conductor carrier, a plurality of pairs of first conductors, two of the first conductors being electrically coupled together at their ends, and a plurality of pairs of second conductors, two of the second conductors being electrically coupled together at their ends, and wherein, as conductor bundles, in each case one of the first conductors of a pair and one of the second conductors of a pair are jointly arranged on a first side of the conductor carrier and the further first conductor of the respective pair and the further second conductor of the respective pair are arranged on a second side of the conductor carrier.

CARRIER BOARD STRUCTURE WITH AN INCREASED CORE-LAYER TRACE AREA AND METHOD FOR MANUFACTURING SAME
20210378092 · 2021-12-02 ·

Carrier board structure with an increased core-layer trace area and method for manufacturing the same are introduced. The carrier board structure comprises a core layer structure, a first circuit build-up structure, and a second circuit build-up structure. The core layer structure comprises a core layer, a signal transmission portion, and an embedded circuit layer, wherein the signal transmission portion and the embedded circuit layer are disposed inside the core layer and electrically connected. The first circuit build-up structure is disposed on the core layer on a same side as the embedded circuit layer and is electrically connected to the embedded circuit layer. The second circuit build-up structure is disposed on the core layer on a same side as the signal transmission portion, and is electrically connected to the first circuit build-up structure through the signal transmission portion and the embedded circuit layer.

Multilayer printed circuit board and electronic device including the same

A multilayer printed circuit board (PCB) including a plurality of substrate layers formed in stack is provided. The multilayer printed circuit board includes a first substrate layer located on an outer side of the plurality of substrate layers, and a second substrate layer located on another outer side of the plurality of substrate layers that is opposite to the first substrate layer. The multilayer printed circuit board further includes a transmission line, connecting a first point of the first substrate layer and a second point of the second substrate layer, which passes through the first and second substrate layers, and includes a sub-transmission line disposed between and extended along at least two adjacent substrate layers among the plurality of substrate layers.

LIGHT-EMITTING MODULE

A light-emitting module includes (i) a board provided with: a circuit pattern and a plurality of bottomed holes in each of a set of wiring pads continuous with the circuit pattern on a first surface; electrically conductive paste extending over two or more of the bottomed holes; and an insulating resin covering the electrically conductive paste at a side close to the first surface, and (ii) a plurality of light-emitting segments connected to a second surface of the board with an adhesive sheet interposed therebetween. The light-emitting segments each include a plurality of light-emitting devices that are aligned. The electrically conductive paste includes a portion disposed on a portion of a surface of the wiring pad extending over two or more of the bottomed holes.

ELECTRONIC DEVICE INCLUDING BONDED PARTS AND METHOD FOR DETECTING THE SAME
20220132658 · 2022-04-28 ·

An electronic device, which includes at least a first part and a second part bonded to each other is provided. The first part includes a first bonding area. The first bonding area includes at least one first testing area. The first testing area includes a plurality of testing pads. The second part includes a second boding area corresponding to the first bonding area. The second bonding area includes a plurality of testing terminals, and includes at least one second testing area respectively corresponding to the at least one first testing area. The second testing area includes a plurality of testing pins. The plurality of testing pads, the plurality of testing terminals and the plurality of testing pins are configured to form a current channel and a voltage testing channel, for measuring a resistance of bonded testing pads and testing pins on both the current channel and the voltage testing channel.