A method for step-soldering includes applying a first solder alloy having a melting point in a temperature range from 160 to 210° C. to a jointed portion of a first electronic component and a substrate, and heating them in the temperature range from 160 to 210° C., and applying a second solder alloy having the melting point in a temperature range lower than 160° C. to a joint portion of a second electronic component and the substrate, and heating them in the temperature range lower than 160° C. The first solder alloy consists of 13-22 mass % of In, 0.5-2.8 mass % of Ag, 0.5-5.0 mass % of Bi, 0.002-0.05 mass % of Ni and a balance Sn.

An optical circuit is provided in which electric circuit parts and optical circuit parts are integrated in a stack on a printed substrate. The optical circuit is provided with a lid having a temperature regulation function that uses a temperature control element and an optical fiber block capable of optical input and output. Temperature control of optical circuit elements can be efficiently performed by mounting electric circuit parts and optical circuit parts on a printed substrate in advance by a reflow step using OBO technology and subsequently attaching a lid that includes a temperature control element.

A power system includes a power module, an electronic load and a system board. The power module includes a first surface, a second surface, a switch and a plurality of conductive parts, wherein the switch is disposed on the first surface of the power module and the plurality of conductive parts are disposed on the second surface of the power module. The electronic load includes a plurality of conductive parts. The power module and the electronic load are disposed on two opposite sides of the system board, the power module delivers power to the electronic load through the system board, and gaps and networks of the plurality of conductive parts of the power module correspond to those of the plurality of conductive parts of the electronic load.

In one embodiment, an apparatus generally comprises a printed circuit board comprising a first side, a second side, and a plurality of power vias extending from the first side to the second side, the first side configured for receiving an application specific integrated circuit (ASIC), and a power delivery board mounted on the second side of the printed circuit board and comprising a power plane interconnected with power vias in the power delivery board to electrically couple voltage regulator modules and the ASIC. The voltage regulator modules are mounted on the second side of the printed circuit board.

An optoelectronic apparatus (200) and an optoelectronic integration method are disclosed, so that bandwidth for signal transmission can be improved, and signal transmission performance is improved. The optoelectronic apparatus (200) includes: a printed circuit board PCB (201), where a first substrate (203) and a second substrate (205) are separately disposed on the PCB (201), an application specific integrated circuit ASIC (202) is disposed on the first substrate (203), and an optoelectronic component (204) is disposed on the second substrate (205); and a flexible printed circuit FPC (206), where a first end of the FPC (206) is disposed on an upper surface of the first substrate (203) and is electrically connected to the ASIC (202), and a second end of the FPC (206) is disposed on the second substrate (205) and is electrically connected to the optoelectronic component (204).

An electronic module includes at least one electronic component including a first principal surface, first and second electrodes on the first principal surface, a wiring board including a second principal surface, third and fourth electrodes on the second principal surface, and a conductive resin portion. The conductive resin portion includes at least one first conductive resin portion joining the first and third electrodes, and at least one second conductive resin portion joining the second and fourth electrodes. The electronic module further includes at least one reinforcing resin portion that is disposed between at least one first and at least one second conductive resin portions and joins the first principal surface of the electronic component with the second principal surface of the wiring board.

A conductive solder pad for a ball grid array (BGA) includes a concave edge to accommodate a via that exits a substrate at a position at the surface of the substrate that is offset from the solder pad. The offset arrangement of the via and solder pad allow for differential thermal expansion of the substrate material and the via material with reduced risk of cracking or fracturing the solder joint. The concave edge of the solder pad provides a gap from the via to avoid unintended electrical connections while maintaining the solder-joint pitch of the BGA.

Aspects include a hybrid socket dynamic warp indicator for socket connector systems and methods of using the same to measure the warpage of a printed circuit board assembly. The method can include providing a printed circuit board having a plurality of pads and a socket. A warp indicator having a plurality of solder joint connections and a resistor array is electrically coupled to the printed circuit board to build a printed circuit board assembly. The printed circuit board assembly is subjected to a thermal event. A resistance across the resistor array is measured after the thermal event. A number of separations between one or more pads of the printed circuit board and one or more solder joint connections of the warp indicator is determined based on a change in the resistance. A defective warpage condition for the socket is determined based on the number of separations.

A circuit structure includes a circuit board, microstrips, a stripline, and vias. The circuit board includes conductive levels. A first and second transceiving circuits are disposed on a first conductive level. A first microstrip is disposed on the first conductive level, and configured to couple a first pin of the first transceiving circuit to a second pin of the second transceiving circuit. A second and third microstrips are disposed on the first conductive level, and coupled to a third pin of the first transceiving circuit and a fourth pin of the second transceiving circuit, respectively. The stripline is disposed on a second conductive level. A first and second vias cross the first and second levels, and couple the second and third microstrips to the stripline. The first and third pins are an inner and outer pins of a front line of a BGA of the first transceiving circuit, respectively.

A shield for a cable attachment system for attaching a cable to a component having a ball grid array (BGA). The shield may comprise an outer conductive surface, a first end configured to be coupled to a surface of the component, a second end that receives the cable, and an inner non-conductive material received within the shield adjacent the first end and encasing the connection of the cable to the BGA of the component. The cable may be configured to be coupled to the BGA of the component.