Disclosed are a thin film transistor includes a gate electrode, an active layer including a semiconductor material and a first elastomer, a gate insulator between the gate electrode and the active layer, and a source electrode and a drain electrode electrically connected to the active layer, wherein each of the semiconductor material and the first elastomer has a hydrogen bondable moiety, and the semiconductor material and the first elastomer are subjected to a dynamic intermolecular bonding by a hydrogen bond and a thin film transistor array and an electronic device including the same.

A technique of forming a stack of layers defining electrical circuitry and comprising a plurality of inorganic conductor levels, wherein the method comprises: forming a conductor for at least one of the conductor levels in stages before and after a step of patterning an underlying organic layer.

A field emission transistor uses carbon nanotubes positioned to extend along a substrate plane rather than perpendicularly thereto. The carbon nanotubes may be pre-manufactured and applied to the substrate and then may be etched to create a gap between the carbon nanotubes and an anode through which electrons may flow by field emission. A planar gate may be positioned beneath the gap to provide a triode structure.

In a method of forming a gate-all-around field effect transistor (GAA FET), a fin structure is formed. The fin structure includes a plurality of stacked structures each comprising a dielectric layer, a CNT over the dielectric layer, a support layer over the CNT. A sacrificial gate structure is formed over the fin structure, an isolation insulating layer is formed, a source/drain opening is formed by patterning the isolation insulating layer, the support layer is removed from each of the plurality of stacked structures in the source/drain opening, and a source/drain contact layer is formed in the source/drain opening. The source/drain contact is formed such that the source/drain contact is in direct contact with only a part of the CNT and a part of the dielectric layer is disposed between the source/drain contact and the CNT.

A semiconductor device includes a substrate, a nanotube structure, and a gate structure. The nanotube structure is disposed over the substrate. The nanotube structure includes a semiconducting carbon nanotube (s-CNT) and a first insulating nanotube. The first insulating nanotube has an inert surface on the s-CNT. The gate structure includes a first metallic carbon nanotube (m-CNT) over the nanotube structure.

A semiconductor device includes a substrate, a nanotube structure, and a gate structure. The nanotube structure is disposed over the substrate. The nanotube structure includes a semiconducting carbon nanotube (s-CNT) and a first insulating nanotube. The first insulating nanotube has an inert surface on the s-CNT. The gate structure includes a first metallic carbon nanotube (m-CNT) over the nanotube structure.

The present invention relates to organic thin film transistors and the preparation and use thereof in sensing applications, and in particular in glucose sensing applications.

In a method of manufacturing a gate-all-around field effect transistor, a trench is formed over a substrate. Nano-tube structures are arranged into the trench, each of which includes a carbon nanotube (CNT) having a gate dielectric layer wrapping around the CNT and a gate electrode layer over the gate dielectric layer. An anchor layer is formed in the trench. A part of the anchor layer is removed at a source/drain (S/D) region. The gate electrode layer and the gate dielectric layer are removed at the S/D region, thereby exposing a part of the CNT at the S/D region. An S/D electrode layer is formed on the exposed part of the CNT. A part of the anchor layer is removed at a gate region, thereby exposing a part of the gate electrode layer of the gate structure. A gate contact layer is formed on the exposed part of the gate electrode layer.

In a method of forming a gate-all-around field effect transistor (GAA FET), a bottom support layer is formed over a substrate and a first group of carbon nanotubes (CNTs) are disposed over the bottom support layer. A first support layer is formed over the first group of CNTs and the bottom support layer such that the first group of CNTs are embedded in the first support layer. A second group of carbon nanotubes (CNTs) are disposed over the first support layer. A second support layer is formed over the second group of CNTs and the first support layer such that the second group of CNTs are embedded in the second support layer. A fin structure is formed by patterning at least the first support layer and the second support layer.

A device comprising: a stack of layers defining an array of transistors, wherein the stack of layers includes a surface conductor pattern defining (i) an array of gate conductors each providing the gate electrodes for a respective column of transistors, and (ii) an array of pixel conductors, each pixel conductor associated with a respective transistor, and connected via a semiconductor channel of the respective transistor to one of an array of row conductors, each row conductor associated with a respective row of transistors; wherein each gate conductor is configured to extend substantially completely around the pixel conductors of the respective column of transistors associated with the gate conductor.