The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.

In some implementations, fluorine is oxidized after dry etching an oxide layer above a source/drain contact and before cleaning. Accordingly, less hydrofluoric acid is formed during cleaning, which reduces unexpected wet etching of the source/drain contact. This allows for forming a recess in the source/drain contact with a depth to width ratio in a range from approximately 1.0 to approximately 1.4 and prevents damage to a layer of silicide below the source/drain that can be caused by excessive hydrofluoric acid. Additionally, or alternatively, the recess is formed using multiple wet etch processes, and any residual fluorine is oxidized between the wet etch processes. Accordingly, each wet etching process may be shorter and less corrosive, which allows for greater control over dimensions of the recess. Additionally, less hydrofluoric acid may be formed during cleaning processes between the wet etch processes, which reduces the etching of the source/drain contact between processes.

Provided are compositions useful for the cleaning of microelectronic device structures. The residues may include post-CMP, post-etch, post-ash residues, pad and brush debris, metal and metal oxide particles and precipitated metal organic complexes such as copper-benzotriazole complexes. Advantageously, the compositions as described herein show improved aluminum, cobalt, and copper compatibility.

A method of etching silicon oxide on a surface of a substrate is provided. The method comprises alternately repeating heating the substrate to a heating temperature of 60° C. or higher, supplying hydrogen fluoride gas and ammonia gas onto the substrate to react with the silicon oxide, and modifying the silicon oxide to obtain a reaction product, and removing at least a portion of the reaction product from the substrate while stopping the supply of the above gases and continuing to heat the substrate at the heating temperature; and when a process gas that is at least one of the hydrogen fluoride gas and the ammonia gas is supplied, while continuing to supply the process gas from an upstream side of a flow path, closing a valve disposed in the flow path to pressurize the process gas in the flow path, and then opening the valve.

Methods for pre-cleaning substrates having metal and dielectric surfaces are described. A substrate comprising a surface structure with a metal bottom, dielectric sidewalls, and a field of dielectric is exposed to a dual plasma treatment in a processing chamber to remove chemical residual and/or impurities from the metal bottom, the dielectric sidewalls, and/or the field of the dielectric and/or repair surface defects in the dielectric sidewalls and/or the field of the dielectric. The dual plasma treatment comprises a direct plasma and a remote plasma.

This disclosure relates to a cleaning composition that contains 1) hydroxylamine; 2) a chelating agent; 3) an alkylene glycol; and 4) water. This disclosure also relates to a method of using the above composition for cleaning a semiconductor substrate.

The present application discloses a method for fabricating a semiconductor device. The method for fabricating a semiconductor device includes providing a substrate, forming a pad structure above the substrate, and forming a top groove on a top surface of the pad structure.

Methods for processing a workpiece are provided. Conducting a thermal treatment on a workpiece are provided. The workpiece contains at least one layer of metal. The method can include generating one or more species from a process gas. The process gas can include hydrogen or deuterium. The method can include filtering the one or more species to create a filtered mixture and exposing the workpiece to the filtered mixture. An oxidation process on a workpiece are provided. The method can be conducted at a process temperature of less than 350° C.

A method for effectively cleaning vias (20034), trenches (20036) or recessed areas on a substrate (20010) using an ultra/mega sonic device (1003, 3003, 16062, 17072), comprising: applying liquid (1032) into a space between a substrate (20010) and an ultra/mega sonic device (1003, 3003, 16062, 17072); setting an ultra/mega sonic power supply at frequency f.sub.1 and power P.sub.1 to drive said ultra/mega sonic device (1003, 3003, 16062, 17072); after the ratio of total bubbles volume to volume inside vias (20034), trenches (20036) or recessed areas on the substrate (20010) increasing to a first set value, setting said ultra/mega sonic power supply at frequency f.sub.2 and power P.sub.2 to drive said ultra/mega sonic device (1003, 3003, 16062, 17072); after the ratio of total bubbles volume to volume inside the vias (20034), trenches (20036) or recessed areas reducing to a second set value, setting said ultra/mega sonic power supply at frequency f.sub.1 and power P.sub.1 again; repeating above steps till the substrate (20010) being cleaned.

Embodiments described herein relate generally to methods for forming a conductive feature in a dielectric layer in semiconductor processing and structures formed thereby. In some embodiments, a structure includes a dielectric layer over a substrate, a surface modification layer, and a conductive feature. The dielectric layer has a sidewall. The surface modification layer is along the sidewall, and the surface modification layer includes phosphorous and carbon. The conductive feature is along the surface modification layer.