An embodiment method includes: forming a gate stack over a channel region; growing a source/drain region adjacent the channel region; depositing a first ILD layer over the source/drain region and the gate stack; forming a source/drain contact through the first ILD layer to physically contact the source/drain region; forming a gate contact through the first ILD layer to physically contact the gate stack; performing an etching process to partially expose a first sidewall and a second sidewall, the first sidewall being at a first interface of the source/drain contact and the first ILD layer, the second sidewall being at a second interface of the gate contact and the first ILD layer; forming a first conductive feature physically contacting the first sidewall and a first top surface of the source/drain contact; and forming a second conductive feature physically contacting the second sidewall and a second top surface of the gate contact.

A substrate cleaning roll that has a cylindrical shape and scrubs a surface of a substrate by rotating about a rotational axis in a longitudinal direction in contact with the substrate, the longitudinal direction being parallel to the surface of the substrate, the substrate cleaning roll including a bevel cleaner at least at one end of the substrate cleaning roll in the longitudinal direction, the bevel cleaner including a sloping surface to be in contact with an outermost edge of a bevel portion at a rim of the substrate when the substrate cleaning roll comes into contact with the substrate and cleans the surface of the substrate.

A cleaning agent is provided for a semiconductor substrate superior in corrosion resistance of a tungsten wiring or a tungsten alloy wiring, and superior in removal property of polishing fines (particle) such as silica or alumina, remaining at surface of the semiconductor substrate, in particular, at surface of a silicon oxide film such as a TEOS film, after a chemical mechanical polishing process; and a method for processing a semiconductor substrate surface. A cleaning agent for a semiconductor substrate is to be used in a post process of a chemical mechanical polishing process of the semiconductor substrate having a tungsten wiring or a tungsten alloy wiring, and a silicon oxide film, comprising (A) a phosphonic acid-based chelating agent, (B) a primary or secondary monoamine having at least one alkyl group or hydroxyalkyl group in a molecule and (C) water, wherein a pH is over 6 and below 7.

A semiconductor manufacturing method includes depositing a low-k dielectric layer, forming a trench in the low-k dielectric layer, forming a barrier layer in the trench, filling a metal on the barrier layer, planarizing the metal, and forming a capping layer on the planarized metal, wherein the capping layer includes at least two layers.

A cleaning apparatus for removing particles from a substrate is provided. The cleaning apparatus includes a first cleaning unit including a first dual nozzle supplying, to a substrate, a first chemical liquid and a first spray including a first liquid dissolving the first chemical liquid, and a second cleaning unit including a second dual nozzle supplying, to the substrate, a second chemical liquid different from the first chemical liquid and a second spray including a second liquid dissolving the second chemical liquid and being the same as the first liquid.

Various methods for fabricating a semiconductor device by selective in-situ cleaning of a target surface of a semiconductor substrate by selective dry surface atomic layer etching of the target surface film, selectively removing one or more top layers of atoms from the target surface film of the semiconductor substrate. The selective in-situ cleaning of a target surface can be followed by deposition on the cleaned target surface such as to form a cap layer, a conductive contact layer, or a gate dielectric layer.

An object of the present invention is to provide a cleaning liquid that effectively removes in a short time organic residues and abrasive grains derived from a slurry in a semiconductor substrate in which a Co contact plug and/or Co wiring are present.

The present invention relates to a cleaning liquid composition for cleaning a substrate having a Co contact plug and/or Co wiring, which contains one or more reducing agents and water. Furthermore, the present invention relates to a cleaning liquid composition for cleaning a substrate having Co and not having Cu, which contains one or more reducing agents and water and has a pH of 3 or more and less than 12.

A semiconductor processing tool includes a cleaning chamber configured to perform a post-chemical mechanical polishing/planarization (post-CMP) cleaning operation in an oxygen-free (or in a near oxygen-free) manner. An inert gas may be provided into the cleaning chamber to remove oxygen from the cleaning chamber such that the post-CMP cleaning operation may be performed in an oxygen-free (or in a near oxygen-free) environment. In this way, the post-CMP cleaning operation may be performed in an environment that may reduce oxygen-causing corrosion of metallization layers and/or metallization structures on and/or in the semiconductor wafer, which may increase semiconductor processing yield, may decrease semiconductor processing defects, and/or may increase semiconductor processing quality, among other examples.

A method for fabricating a semiconductor structure includes following steps. First, a first layer, a second layer and a third layer are sequentially formed on the substrate. The second layer is conformally disposed on the top surface of the first layer. The second layer and the first layer have different compositions, and the third layer and the second layer also have different compositions. Then, a planarizing process is performed on the third layer until portions of the second layer are exposed. Afterwards, hydrofluoric acid and aqueous oxidant are concurrently or sequentially provided to the remaining second and third layers. Finally, an etch back process is carried out to remove all the second layer and portions of the first layer.

A method for forming a semiconductor device structure is provided. The method includes forming a first layer over a substrate. The first layer is made of a semiconductor material. The method includes forming a stop layer over the first layer. The method includes forming a second layer over the stop layer. The second layer is in direct contact with the stop layer. The method includes removing the second layer. The method includes performing an etching process to remove the stop layer and an upper portion of the first layer. The method includes performing a first planarization process over the first layer.