H01L21/0237

III-nitride semiconductor structures with strain absorbing interlayers

There are disclosed herein various implementations of semiconductor structures including III-Nitride interlayer modules. One exemplary implementation comprises a substrate and a first transition body over the substrate. The first transition body has a first lattice parameter at a first surface and a second lattice parameter at a second surface opposite the first surface. The exemplary implementation further comprises a second transition body, such as a transition module, having a smaller lattice parameter at a lower surface overlying the second surface of the first transition body and a larger lattice parameter at an upper surface of the second transition body, as well as a III-Nitride semiconductor layer over the second transition body. The second transition body may consist of two or more transition modules, and each transition module may include two or more interlayers. The first and second transition bodies reduce strain for the semiconductor structure.

Planar nonpolar group-III nitride films grown on miscut substrates

A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an a-axis direction comprising a 0.15° or greater miscut angle towards the a-axis direction and a less than 30° miscut angle towards the a-axis direction.

Epitaxy technique for growing semiconductor compounds

A solution for fabricating a semiconductor structure is provided. The semiconductor structure includes a plurality of semiconductor layers grown over a substrate using a set of epitaxial growth periods. During each epitaxial growth period, a first semiconductor layer having one of: a tensile stress or a compressive stress is grown followed by growth of a second semiconductor layer having the other of: the tensile stress or the compressive stress directly on the first semiconductor layer.

Metal oxide film and method for forming metal oxide film

A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nmφ and less than or equal to 10 nmφ.

Optoelectronic semiconductor chip and method for the production thereof

A method for producing an optoelectronic semiconductor chip based on a nitride semiconductor system is specified. The method comprises the steps of: forming a semiconductor section with at least one p-doped region; and forming a covering layer disposed downstream of the semiconductor section in a growth direction of the semiconductor chip, said covering layer having at least one n-doped semiconductor layer. An activation step suitable for electrically activating the p-doped region is effected before or during the formation of the covering layer. An optoelectronic semiconductor chip which can be produced by the method is additionally specified.

GROUP III NITRIDE SEMICONDUCTOR, AND METHOD FOR PRODUCING SAME
20170338101 · 2017-11-23 ·

On an RAMO.sub.4 substrate containing a single crystal represented by the general formula RAMO.sub.4 (wherein R represents one or a plurality of trivalent elements selected from a group of elements including: Sc, In, Y, and a lanthanoid element, A represents one or a plurality of trivalent elements selected from a group of elements including: Fe(III), Ga, and Al, and M represents one or a plurality of divalent elements selected from a group of elements including: Mg, Mn, Fe(II), Co, Cu, Zn, and Cd), a buffer layer containing a nitride of In and a Group III element except for In is formed, and a Group III nitride crystal is formed on the buffer layer.

Semiconductor formation by lateral diffusion liquid phase epitaxy
09824892 · 2017-11-21 · ·

A method for growing semiconductor wafers by lateral diffusion liquid phase epitaxy is described. Also provided are a refractory device for practicing the disclosed method and semiconductor wafers prepared by the disclosed method and device. The disclosed method and device allow for significant cost and material waste savings over current semiconductor production technologies.

Preparing a semiconductor surface for epitaxial deposition

Provided is a method of epitaxial deposition, which involves dry-etching a semiconductor substrate with a fluorine containing species and exposing the dry-etched substrate to hydrogen atoms, prior to epitaxially depositing a semiconductor layer to the surface of the substrate.

PLANAR NONPOLAR GROUP III-NITRIDE FILMS GROWN ON MISCUT SUBSTRATES

A nonpolar III-nitride film grown on a miscut angle of a substrate. The miscut angle towards the <000-1> direction is 0.75° or greater miscut and less than 27° miscut towards the <000-1> direction. Surface undulations are suppressed and may comprise faceted pyramids. A device fabricated using the film is also disclosed. A nonpolar III-nitride film having a smooth surface morphology fabricated using a method comprising selecting a miscut angle of a substrate upon which the nonpolar III-nitride films are grown in order to suppress surface undulations of the nonpolar III-nitride films. A nonpolar III-nitride-based device grown on a film having a smooth surface morphology grown on a miscut angle of a substrate which the nonpolar III-nitride films are grown. The miscut angle may also be selected to achieve long wavelength light emission from the nonpolar film.

LIGHT EMITTING DEVICE

The disclosed light emitting device includes an intermediate layer interposed between the light emitting semiconductor structure and the substrate. The light emitting semiconductor structure includes a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer, wherein the active layer has a multi quantum well structure including at least one period of a pair structure of a quantum barrier layer including Al.sub.xGa.sub.(1-x)N (0<x<1) and a quantum well layer including Al.sub.yGa.sub.(1-y)N (0<x<y<1), and at least one of the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer includes AlGaN. The intermediate layer includes AlN and has a plurality of air voids formed in the AlN. At least some of the air voids are irregularly aligned and the number of the air voids is 10.sup.7 to 10.sup.10/cm.sup.2.