H01L21/02428

Gallium-nitride based devices implementing an engineered substrate structure

A micro-electromechanical system (MEMS) device includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer coupled to the polycrystalline ceramic core, a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The support structure defines a cavity. The MEMS device also includes a III-V membrane coupled to a portion of the support structure. A portion of the III-V membrane is suspended over the cavity defined by the support structure and defines a MEMS structure.

HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) DEVICES AND METHODS
20210091219 · 2021-03-25 ·

Embodiments are directed to high electron mobility transistor (HEMT) devices and methods. One such HEMT device includes a substrate having a first surface, and first and second heterostructures on the substrate and facing each other. Each of the first and second heterostructures includes a first semiconductor layer on the first surface of the substrate, a second semiconductor layer on the first surface of the substrate, and a two-dimensional electrode gas (2DEG) layer between the first and second semiconductor layers. A doped semiconductor layer is disposed between the first and second heterostructures, and a source contact is disposed on the first heterostructure and the second heterostructure.

Semiconductor structure formation

Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.

METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT

A method for manufacturing a semiconductor element includes: providing a wafer comprising first and second regions at an upper surface of the wafer, the second region being located at a periphery of the first region and being at a lower position than the first region; and forming a semiconductor layer made of a nitride semiconductor at the upper surface of the wafer. In a top-view, the first region comprises an extension portion at an end portion of the first region in a first direction that passes through the center of the wafer parallel to an m-axis of the semiconductor layer, the extension portion extending in a direction from a center of the wafer toward an edge of the wafer or in a direction from an edge of the wafer toward a center of the wafer.

STACK COMPRISING SINGLE-CRYSTAL DIAMOND SUBSTRATE

There is provided a novel stack that includes a single-crystal diamond substrate having a coalescence boundary, yet effectively uses the coalescence boundary. A stack comprising at least a semiconductor drift layer stacked on a single-crystal diamond substrate having a coalescence boundary, wherein the coalescence boundary of the single-crystal diamond substrate is a region that exhibits, in a Raman spectrum at a laser excitation wavelength of 785 nm, a full width at half maximum of a peak near 1332 cm.sup.1 due to diamond that is observed to be broader than a full width at half maximum of the peak exhibited by a region different from the coalescence boundary, the coalescence boundary has a width of 200 m or more, and the semiconductor drift layer is stacked on at least the coalescence boundary.

Group III nitride semiconductor substrate and method for manufacturing group III nitride semiconductor substrate

A method for manufacturing a group III nitride semiconductor substrate includes a preparation step S10 for preparing a group III nitride semiconductor substrate having a sapphire substrate having a semipolar plane as a main surface, and a group III nitride semiconductor layer positioned over the main surface, in which a <0002> direction of the sapphire substrate and a <10-10> direction of the group III nitride semiconductor layer do not intersect at right angles in a plan view in a direction perpendicular to the main surface, and a growth step S20 for epitaxially growing a group III nitride semiconductor over the group III nitride semiconductor layer.

Composite oxide semiconductor and method for manufacturing the same

The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. A semiconductor layer of a transistor is formed using a composite oxide semiconductor in which a first region and a second region are mixed. The first region includes a plurality of first clusters containing one or more of indium, zinc, and oxygen as a main component. The second region includes a plurality of second clusters containing one or more of indium, an element M (M represents Al, Ga, Y, or Sn), zinc, and oxygen. The first region includes a portion in which the plurality of first clusters are connected to each other. The second region includes a portion in which the plurality of second clusters are connected to each other.

Display device
10847733 · 2020-11-24 · ·

Reliability of a resin substrate is further enhanced. A first resin layer is made of polymer resin having a long-axis direction. A second resin layer is made of polymer resin having a long-axis direction slanted with respect to the long-axis direction in a plan view.

METHODS OF MANUFACTURING ENGINEERED SUBSTRATE STRUCTURES FOR POWER AND RF APPLICATIONS
20200350154 · 2020-11-05 · ·

A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core in a first adhesion shell, encapsulating the first adhesion shell in a conductive shell, encapsulating the conductive shell in a second adhesion shell, and encapsulating the second adhesion shell in a barrier shell. The method also includes joining a bonding layer to the support structure, joining a substantially single crystalline silicon layer to the bonding layer, forming an epitaxial silicon layer by epitaxial growth on the substantially single crystalline silicon layer, and forming one or more epitaxial layers by epitaxial growth on the epitaxial silicon layer.

SUBSTRATES AND METHODS FOR FORMING THE SAME

A substrate includes a ceramic core, a first adhesion layer, a barrier layer, and a second adhesion layer. The first adhesion layer encapsulates the ceramic core and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the first adhesion layer has a first ratio. The barrier layer encapsulates the first adhesion layer and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the barrier layer has a second ratio that is different from the first ratio. The second adhesion layer encapsulates the barrier layer and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the second adhesion layer has a third ratio that is different from the second ratio.