According to one embodiment, a substrate processing device includes a stage configured to mount a substrate, a mold having a first surface facing an upper surface of an outer peripheral edge of the substrate and a second surface facing a side surface of an outer peripheral continuous with the upper surface of the outer peripheral edge, a mold moving mechanism configured to move the mold to bring the first surface close to the upper surface of the outer peripheral edge of the substrate and the second surface close to the side surface of the outer peripheral of the substrate, and a nozzle arranged in the mold, wherein the nozzle ejects resist.

A storage container storing a treatment liquid for manufacturing a semiconductor is provided, wherein the occurrence of defects on the semiconductor, such as particles, is suppressed and a fine resist pattern or a fine semiconductor element is manufactured. The storage container includes a storage portion that stores a treatment liquid for manufacturing a semiconductor, and the treatment liquid for manufacturing a semiconductor includes one kind or two or more kinds of metal atoms and a total content of particulate metal is 0.01 to 100 mass ppt with respect to a total mass of the treatment liquid.

A molding apparatus for molding a composition on a substrate using a mold includes a moving unit configured to hold and move the substrate and a gaseous matter supplying unit configured to supply gaseous matter. The gaseous matter supplying unit includes a supply port arranged in a periphery of the substrate held by the moving unit, and supplies the gaseous matter from the supply port while the moving unit is moving the substrate after the composite is supplied to the molding area in the periphery of the substrate.

Methods for manufacturing double-slanted gate connected field plates that allow for the simultaneous optimization of electric field distributions between gate and drain terminals and gate and source terminals are described. A technical benefit of manufacturing the double-slanted gate connected field plate using greyscale lithography is that fabrication costs may be substantially reduced by reducing the number of process steps required to form the double-slanted gate connected field plate. The source-side slope and the drain-side slope of the double-slanted gate connected field plate may be concurrently formed with two different slopes or two different step profiles.

A method of manufacturing a semiconductor device includes forming a first resist layer over a substrate, and forming a second resist layer over the first resist layer. The second resist layer is patterned to expose a portion of the first resist layer to form a second resist layer pattern. The first resist layer is exposed to extreme ultraviolet (XUV) radiation diffracted by the second resist layer pattern. Portions of the first resist layer exposed to the XUV radiation diffracted by the second resist layer are removed.

A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure, a first dielectric layer, a second dielectric layer, a first plug and two metal lines. The substrate has a shallow trench isolation and an active area, and the gate structure is disposed on the substrate to cover a boundary between the active area and the shallow trench isolation. The first dielectric layer is disposed on the substrate, to cover the gate structure, and the first plug is disposed in the first dielectric layer to directly in contact with a conductive layer of the gate structure and the active area. The second dielectric layer is disposed on the first dielectric layer, with the first plug and the gate being entirely covered by the first dielectric layer and the second dielectric layer. The two metal lines are disposed in the second dielectric layer.

A manufacturing method of a semiconductor device includes forming a hard mask layer and a photoresist on a substrate having a layer to be etched, and performing exposure and development such that the patterned photoresist has first trenches and to expose the hard mask layer, wherein ends of the first trenches have a width gradually decreased toward an end point. The exposed hard mask layer is removed using the patterned photoresist to transfer the pattern of the first trenches to the hard mask layer such that the patterned hard mask layer has second trenches, and the ends of the second trenches have a width gradually decreased toward an end point. Spacers are formed on inner walls of the second trenches. The hard mask layer is removed such that the layer to be etched is exposed. The exposed layer to be etched is removed using the spacers as an etch mask.

An exemplary semiconductor fabrication stack includes underlying layers; an organic planarization layer atop the underlying layers; a metal oxide hardmask atop the organic planarization layer and doped with both carbon and nitrogen; and an organic photoresist directly atop the doped metal oxide hardmask. In one or more embodiments, the doped metal oxide hardmask exhibits a water contact angle of greater than 80°.

In a method of coating a photo resist over a wafer, dispensing the photo resist from a nozzle over the wafer is started while rotating the wafer, and dispensing the photo resist is stopped while rotating the wafer. After starting and before stopping the dispensing the photo resist, a wafer rotation speed is changed at least 4 times. During dispensing, an arm holding the nozzle may move horizontally. A tip end of the nozzle may be located at a height of 2.5 mm to 3.5 mm from the wafer.

A method for fabricating a semiconductor device includes following steps: A patterned mask layer including a plurality of standing walls and a covering part is formed on a surface of a semiconductor substrate, wherein two adjacent standing walls define a first opening exposing a part of the surface, and the covering part blankets the surface. A first patterned photoresist layer is formed to partially cover the covering part. A first etching process is performed to form a first trench in the substrate, passing through the surface and aligning with the first opening. A portion of the patterned mask layer is removed to form a second opening exposing another portion of the surface. A second etching process is performed to form a second trench in the substrate and define an active area on the surface. The depth of the first trench is greater than that of the second trench.