Patent classifications
H01L21/263
Method for removing re-sputtered material from patterned sidewalls
The present invention provides a method for removing re-sputtered material on a substrate. A process chamber having a plasma source and a substrate support is provided along with the substrate having an upper surface and a lower surface. A masking material having a patterned sidewall is patterned onto the upper surface of the substrate along with a sacrificial layer between the upper surface of the substrate and the masking material. The lower surface of the substrate is placed onto the substrate support. A plasma is generated using the plasma source. The substrate is processed on the substrate support using the generated plasma. The sacrificial layer is removed after the processing of the substrate.
RAPID AND PRECISE TEMPERATURE CONTROL FOR THERMAL ETCHING
Apparatuses and methods are described. An apparatus may include a processing chamber including chamber walls, a chamber heater configured to heat the walls, a pedestal positioned within the chamber and including a substrate heater having a plurality of light emitting diodes (LEDs) configured to emit light with wavelengths in the range of 400 nanometers (nm) and 800 nm, a window positioned above the heater and having a material transparent to light with wavelengths in the range of 400 nm and 800 nm, and three or more substrate supports, each having a substrate support surface vertically offset from the window and configured to support a substrate such that the window and the substrate are offset by a nonzero distance.
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING ION IMPLANTATION AND SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device in a semiconductor body having a first surface and a second surface is proposed. The method includes implanting protons through the second surface into the semiconductor body. The method further includes implanting ions through the second surface into the semiconductor body. The ions are ions of a non-doping element having an atomic number of at least 9. Thereafter, the method further includes processing the semiconductor body by thermal annealing.
Method and apparatus for non line-of-sight doping
A method of doping a substrate. The method may include providing a substrate in a process chamber. The substrate may include a semiconductor structure, and a dopant layer disposed on a surface of the semiconductor structure. The method may include maintaining the substrate at a first temperature for a first interval, the first temperature corresponding to a vaporization temperature of the dopant layer. The method may further include rapidly cooling the substrate to a second temperature, less than the first temperature, and heating the substrate from the second temperature to a third temperature, greater than the first temperature.
Substrate treating apparatus and liquid supplying method
The inventive concept provides a substrate treating apparatus. In an embodiment, the substrate treating apparatus includes a housing having a treatment space for treating a substrate in an interior thereof, a support unit that supports the substrate in the treatment space, a nozzle that supplies a liquid to the substrate positioned on the support unit, a liquid supply unit that supplies the liquid to the nozzle, and a controller that controls the liquid unit, the liquid supply unit includes a tank having an interior space for storing the liquid, and a first circulation line that circulates the liquid stored in the interior space and in which a first heater is installed, and the controller controls the first heater such that the first heater heats the liquid to a first temperature, at which particles in the interior of the liquid are not eluted.
OPTICAL IMAGE CAPTURING SYSTEM, IMAGE CAPTURING DEVICE AND ELECTRONIC DEVICE
An optical image capturing system comprising, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The first lens element with negative refractive power has a concave image-side surface. The second lens element, the third lens element and the fourth lens element have refractive power. The fifth lens element has refractive power. The sixth lens element with refractive power has an image-side surface being concave in a paraxial region and includes at least one convex shape in an off-axial region, wherein the surfaces thereof are aspheric. The seventh lens element with refractive power has an image-side surface being concave in a paraxial region and includes at least one convex shape in an off-axial region, wherein the surfaces thereof are aspheric.
Semiconductor device and method for producing semiconductor device
A semiconductor device including: a semiconductor substrate having a first and a second side, and including a donor layer with a doping concentration profile in a depth direction from the first to the second side. The donor layer includes: a first peak, situated at a first distance from the first side of said substrate; a first region adjacent to the first peak and extending in the depth direction from the first peak toward the first side, a second peak in said doping concentration profile, situated at a second distance from the first side of said substrate. Said second distance is less than said first distance and greater than zero; and a second region adjacent to the second peak and extending in the depth direction from the second peak toward the first side of the substrate, which has a doping concentration which is substantially uniform.
Semiconductor device and method for producing semiconductor device
A semiconductor device including: a semiconductor substrate having a first and a second side, and including a donor layer with a doping concentration profile in a depth direction from the first to the second side. The donor layer includes: a first peak, situated at a first distance from the first side of said substrate; a first region adjacent to the first peak and extending in the depth direction from the first peak toward the first side, a second peak in said doping concentration profile, situated at a second distance from the first side of said substrate. Said second distance is less than said first distance and greater than zero; and a second region adjacent to the second peak and extending in the depth direction from the second peak toward the first side of the substrate, which has a doping concentration which is substantially uniform.
Methods and apparatus for predicting performance of a measurement method, measurement method and apparatus
A radiation source arrangement causes interaction between pump radiation (340) and a gaseous medium (406) to generate EUV or soft x-ray radiation by higher harmonic generation (HHG). The operating condition of the radiation source arrangement is monitored by detecting (420/430) third radiation (422) resulting from an interaction between condition sensing radiation and the medium. The condition sensing radiation (740) may be the same as the first radiation or it may be separately applied. The third radiation may be for example a portion of the condition sensing radiation that is reflected or scattered by a vacuum-gas boundary, or it may be lower harmonics of the HHG process, or fluorescence, or scattered. The sensor may include one or more image detectors so that spatial distribution of intensity and/or the angular distribution of the third radiation may be analyzed. Feedback control based on the determined operating condition stabilizes operation of the HHG source.
Method for manufacturing semiconductor device, method for packaging semiconductor chip, method for manufacturing shallow trench isolation (STI)
A method for manufacturing a semiconductor device includes forming a source region, a drain region, and a gate dielectric layer and a gate electrode covering a channel region between the source region and the drain region, forming an insulating layer over the source region, the drain region, and the gate electrode, forming first to third vias penetrating the insulating layer and exposing portions of the source region, the drain region, and the gate electrode, respectively, forming a source contact in the first via to electrically connect to the source region, forming a drain contact in the second via to electrically connect to the drain region, and forming a gate contact in the third via to electrically connect to the gate electrode. One or more of the first to third vias is formed by ion bombarding by a focused ion beam and followed by a thermal annealing process.