Provided is a semiconductor device comprising a semiconductor substrate containing oxygen. An oxygen concentration distribution in a depth direction of the semiconductor substrate has a high oxygen concentration part where an oxygen concentration is higher on a further upper surface-side than a center in the depth direction of the semiconductor substrate than in a lower surface of the semiconductor substrate. The high oxygen concentration part may have a concentration peak in the oxygen concentration distribution. A crystal defect density distribution in the depth direction of the semiconductor substrate has an upper surface-side density peak on the upper surface-side of the semiconductor substrate, and the upper surface-side density peak may be arranged within a depth range in which the oxygen concentration is equal to or greater than 50% of a peak value of the concentration peak.

A method of forming a semiconductor device includes depositing a film over a dielectric layer. The dielectric layer is over a first fin, a second fin, and within a trench between the first fin and the second fin. The method further includes etching top portions of the film, performing a treatment on the dielectric layer to remove impurities after etching the top portions of the film, and filling the trench over the remaining portions of the film. The treatment includes bombarding the dielectric layer with radicals.

A method of manufacturing a semiconductor device includes forming a stack in which first material layers and second material layers are alternately stacked, forming a channel structure passing through the stack, forming openings by removing the first material layers, forming an amorphous blocking layer in the openings, and performing a first heat treatment process to supply deuterium through the openings and substitute hydrogen in the channel structure with the deuterium.

A method of manufacturing a semiconductor device includes forming a stack in which first material layers and second material layers are alternately stacked, forming a channel structure passing through the stack, forming openings by removing the first material layers, forming an amorphous blocking layer in the openings, and performing a first heat treatment process to supply deuterium through the openings and substitute hydrogen in the channel structure with the deuterium.

A leadframe includes a die pad and a set of electrically conductive leads. A semiconductor die, having a front surface and a back surface opposed to the front surface, is arranged on the die pad with the front surface facing away from the die pad. The semiconductor die is electrically coupled to the electrically conductive leads. A package molding material is molded over the semiconductor die arranged on the die pad. A stress absorbing material contained within a cavity delimited by a peripheral wall on the front surface of the semiconductor die is positioned intermediate at least one selected portion of the front surface of the semiconductor die and the package molding material.

A leadframe includes a die pad and a set of electrically conductive leads. A semiconductor die, having a front surface and a back surface opposed to the front surface, is arranged on the die pad with the front surface facing away from the die pad. The semiconductor die is electrically coupled to the electrically conductive leads. A package molding material is molded over the semiconductor die arranged on the die pad. A stress absorbing material contained within a cavity delimited by a peripheral wall on the front surface of the semiconductor die is positioned intermediate at least one selected portion of the front surface of the semiconductor die and the package molding material.

The present disclosure is a substrate processing apparatus including: a chamber configured to accommodate a substrate; a heat source configured to heat-treat the substrate; a heat ray sensor provided outside the chamber and configured to receive infrared rays radiated from the substrate; and an infrared ray transmission window provided in the chamber and configured to transmit an infrared ray having a wavelength greater than or equal to 8 μm to the heat ray sensor.

The present disclosure is a substrate processing apparatus including: a chamber configured to accommodate a substrate; a heat source configured to heat-treat the substrate; a heat ray sensor provided outside the chamber and configured to receive infrared rays radiated from the substrate; and an infrared ray transmission window provided in the chamber and configured to transmit an infrared ray having a wavelength greater than or equal to 8 μm to the heat ray sensor.

An object of the present invention is to provide a novel SiC single crystal with reduced internal stress while suppressing SiC sublimation. In order to solve the above problems, the present invention provides a method for producing SiC single crystals, including a stress reduction step of heating a SiC single crystal at 1800° C. or higher in an atmosphere containing Si and C elements to reduce internal stress in the SiC single crystal. With this configuration, the present invention can provide a novel SiC single crystal with reduced internal stress while suppressing SiC sublimation.

An embodiment of the present invention provides an element transferring method that may increase a yield of transferring an element, and an electronic panel manufacturing method using the same. The element transferring method includes: preparing a carrier film in which a first surface of an element on which a terminal is formed is adhered to an adhesive surface; providing a cover adhesive layer on the adhesive surface so that the second surface of the element that is opposite to the first surface and where the terminal is not formed is covered; transferring the element to the target substrate by adhering the cover adhesive layer to the target substrate while the second surface is facing the target substrate; and separating the carrier film from the element, wherein in transferring the element, the carrier film is pressed so that the surface of the cover adhesive layer is flat at the same height as the terminal.