H01L21/603

Semiconductor device and method of manufacturing the same

A semiconductor device includes a substrate, a first adhesive layer, a first semiconductor chip, and a second adhesive layer. The first adhesive layer is provided above a first surface of the substrate and includes a plurality of types of resins having different molecular weights and a filler. The first semiconductor chip is provided above the first adhesive layer. The second adhesive layer is provided in at least a part of a first region between the substrate and the first adhesive layer, and the second adhesive layer includes at least one type of resins among the plurality of types of resins having a molecular weight smaller than a molecular weight of other types of resins among the plurality of types of resins, and a filler having a lower concentration than that of the first adhesive layer.

PHOTOELECTRIC CONVERSION DEVICE AND MANUFACTURING METHOD AND APPARATUS THEREOF

The present embodiments provide a photoelectric conversion device having a laminate structure of a substrate, a transparent electrode, an active layer, and a counter electrode, stacked in this order. In the device, a cavity is provided on the counter electrode-side. The cavity penetrates through the counter electrode and has an opening area larger in the counter electrode than in the active layer.

WIRE BONDING SYSTEM, INSPECTION DEVICE, WIRE BONDING METHOD, AND RECORDING MEDIUM
20240242984 · 2024-07-18 · ·

A wire bonding system according to the present invention comprises: an acquisition unit that acquires information pertaining to the diameter of a pressure-bonded ball where a wire is pressure-bonded to an electronic component by wire bonding; a first storage unit that stores the information pertaining to the pressure-bonded ball diameter which has been acquired by the acquisition unit; and an inspection unit that inspects the quality of wire bonding on the basis of the information pertaining to the pressure-bonded ball diameter which has been read from the first storage unit. With the wire bonding system, it is possible to enhance convenience in a method for checking the quality of wire bonding.

WIRE BONDING SYSTEM, INSPECTION DEVICE, WIRE BONDING METHOD, AND RECORDING MEDIUM
20240242984 · 2024-07-18 · ·

A wire bonding system according to the present invention comprises: an acquisition unit that acquires information pertaining to the diameter of a pressure-bonded ball where a wire is pressure-bonded to an electronic component by wire bonding; a first storage unit that stores the information pertaining to the pressure-bonded ball diameter which has been acquired by the acquisition unit; and an inspection unit that inspects the quality of wire bonding on the basis of the information pertaining to the pressure-bonded ball diameter which has been read from the first storage unit. With the wire bonding system, it is possible to enhance convenience in a method for checking the quality of wire bonding.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

A semiconductor device includes a substrate, a first adhesive layer, a first semiconductor chip, and a second adhesive layer. The first adhesive layer is provided above a first surface of the substrate and includes a plurality of types of resins having different molecular weights and a filler. The first semiconductor chip is provided above the first adhesive layer. The second adhesive layer is provided in at least a part of a first region between the substrate and the first adhesive layer, and the second adhesive layer includes at least one type of resins among the plurality of types of resins having a molecular weight smaller than a molecular weight of other types of resins among the plurality of types of resins, and a filler having a lower concentration than that of the first adhesive layer.

FAN-OUT PACKAGING METHOD AND PACKAGING STRUCTURE OF STACKED CHIPS THEREOF
20240321704 · 2024-09-26 ·

A fan-out packaging method and packaging structure are provided. The method includes: fixing a first chip in a groove of a dummy chip where the first chip and the dummy chip are provided with a plurality of conductive through holes; bonding the second chip with the dummy chip and the first chip respectively; forming a plastic encapsulation layer to wrap the first chip, the dummy chip and the second chip; and forming a redistribution wiring layer on surfaces of the dummy chip and the first chip away from the second chip. The redistribution layer is electrically connected to the first chip through the plurality of conductive through holes.

FAN-OUT PACKAGING METHOD AND PACKAGING STRUCTURE OF STACKED CHIPS THEREOF
20240321704 · 2024-09-26 ·

A fan-out packaging method and packaging structure are provided. The method includes: fixing a first chip in a groove of a dummy chip where the first chip and the dummy chip are provided with a plurality of conductive through holes; bonding the second chip with the dummy chip and the first chip respectively; forming a plastic encapsulation layer to wrap the first chip, the dummy chip and the second chip; and forming a redistribution wiring layer on surfaces of the dummy chip and the first chip away from the second chip. The redistribution layer is electrically connected to the first chip through the plurality of conductive through holes.

High heat dissipation stacked chip package structure and the manufacture method thereof

The present invention provides a semiconductor device including a first glass substrate, a first integrated chip, a first anisotropic conductive film, a second glass substrate, a second integrated chip, a second anisotropic conductive film, and a packaging body.

High heat dissipation stacked chip package structure and the manufacture method thereof

The present invention provides a semiconductor device including a first glass substrate, a first integrated chip, a first anisotropic conductive film, a second glass substrate, a second integrated chip, a second anisotropic conductive film, and a packaging body.

METHOD OF CORRECTING ESTIMATED FORCE OF BONDING APPARATUS
20180164171 · 2018-06-14 ·

Provided is a method of correcting an estimated force of a bonding apparatus including measuring a first pressure of a first space in a chamber of a bonding apparatus and a second pressure of a second space in the chamber in a first state. In the first state a pressuring member is at rest within the chamber. The pressuring member is moveable within the chamber. The method includes obtaining a first estimated force. The first estimated force is an estimated force of the pressuring member in the first state, using the measured first and second pressures. The method includes obtaining a first error. The first error is a difference between a first real force and the first estimated force. The first real force is a real force of the pressuring member in the first state. The method includes correcting the first estimated force using the first error.