Methods, systems, and devices for enabling the use of a special, generic, or standard substrate for similar system SIP assemblies are disclosed. The required customization, which is defined by a system's interconnecting scheme, is done during package assembly by creating appropriate connections using wire bonds on pads that are placed on the substrate and intentionally left open for purpose of customization. The wire bond links can be changed as required for a given system design.

A lead frame includes an electrode, a hanger lead, and an outer frame and is formed integrally with a supporting member supporting the electrode, so that a package having a depression in which a light-emitting element will be mounted is formed. The depression is open on the upper side, its side walls are mainly constituted of the supporting member, and at least a part of its bottom surface includes the electrode. The electrode is disposed in a supporting member forming region. The hanger lead extends from the outer frame to reach the supporting member forming region. A chamfered surface is formed on at least a part of an upper side corner of an end of the hanger lead.

In one embodiment, the method is configured for producing optoelectronic semiconductor components (1) and includes the steps of: providing a leadframe assembly (20) with a multiplicity of leadframes (2), each having at least two leadframe parts (21, 22); forming at least a part of the leadframe assembly (20) with a housing material for housing bodies (4); dividing the leadframe assembly (20) between at least one part of the columns (C) and/or the rows (R), wherein the leadframes (2) remain arranged in a matrix-like manner; equipping the leadframes (2) with at least one optoelectronic semiconductor chip (3); testing at least one part of the leadframes (2) equipped with the semiconductor chips (3) and formed with the housing material after the step of dividing; and separating to form the semiconductor components (1) after the step of forming and after the step of testing.

A semiconductor device package includes a printed circuit board including a first central area, a second lateral area, and a third lateral area, a semiconductor die including a first main face and a second main face opposite the first main face, a first contact pad on the first main face and a second contact pad on the second main face, the semiconductor die disposed in the first central area of the printed circuit board, a first metallic side wall of the semiconductor device package disposed in the second lateral area of the printed circuit board, a second metallic side wall of the semiconductor device package disposed in the third lateral area of the printed circuit board, wherein at least one of the first metallic side wall and the second metallic side wall is electrically connected with one of the first contact pad or the second contact pad.

A semiconductor device and method of forming the same are provided. The semiconductor device includes at least one substrate and an interconnection structure. The at least one substrate has a cavity partially defined by an inner sidewall of the at least one substrate and a channel disposed at a bottom of the at least one substrate. The channel laterally penetrates through the at least one substrate. The interconnections structure is disposed over the substrate, and the interconnection structure has a through hole penetrating through the interconnection structure. The through hole, the cavity and the channel are in spatial communication with each other.

A semiconductor package includes a die pad; a plurality of external connection terminals located around the die pad; a semiconductor chip located on a top surface of the die pad and electrically connected with the plurality of external connection terminals; and a sealing member covering the die pad, the plurality of external connection terminals and the semiconductor chip and exposing an outer terminal of each of the plurality of external connection terminals. A side surface of the outer terminal of each of the plurality of external connection terminals includes a first area, and the first area is plated.

A method includes attaching semiconductor dies to die attach pads of first and second columns of the lead frame; enclosing the semiconductor dies of the respective columns in respective first and second package structures; trimming the lead frame to separate respective first and second lead portions of adjacent ones of the first and second columns of the lead frame; moving the first columns along a column direction relative to the second columns; and separating individual packaged electronic devices of the respective first and second columns from one another.

A leadframe strip for use in making leaded integrated circuit packages includes a plurality of integrally connected leadframes that each have a die attach pad and first and second dam bars located adjacent to opposite first and second sides of the die attach pad, respectively. A plurality of continuous lead structures extend, uninterrupted by other structure, between opposing ones of the dam bars of horizontally adjacent leadframes. The plurality of integrally connected leadframes are arranged in a plurality of vertical columns, wherein die attach pads in one vertical column are vertically offset from die attach pads in adjacent vertical columns.

A leadframe includes a pattern of electrically-conductive formations with one or more sacrificial connection formations extending bridge-like between a pair of electrically-conductive formations. The sacrificial connection formation or formations are formed at one of the first surface and the second surface of the leadframe and have a thickness less than the leadframe thickness between the first surface and the second surface. A filling of electrically-insulating material is molded between the electrically-conductive formations of the leadframe, with electrically-insulating material molded between the connection formation(s) and the other surface of the leadframe. The sacrificial connection formation(s) counter deformation and displacement of parts during formation and pre-molding of the leadframe.

A package includes a dielectric carrier, an electronic component mounted on the dielectric carrier, and an encapsulant encapsulating at least part of the dielectric carrier and the electronic component. Corresponding methods of manufacturing the package are also described.