A charge pump circuit includes a first pump unit and a second pump unit. The first pump unit includes a first capacitor and a first transistor, and generates a first node voltage by using a clock signal. The second pump unit includes a second capacitor, a second transistor, and a third transistor, and generates a negative output voltage by using the first node voltage. The clock signal and the first node voltage are each toggled between a low-level voltage and a high-level voltage. A magnitude of an absolute value of the negative output voltage is greater than a magnitude of an absolute value of the high-level voltage of the clock signal. A body of the third transistor is electrically isolated from a body of the second transistor.

Some embodiments include apparatuses and methods having a node to receive ground potential, a first diode including an anode coupled to the node, a second diode including an anode coupled to the node, a first circuit to apply a voltage to a cathode of each of the first and second diodes to cause the first and second diodes to be in a forward-bias condition, and a second circuit to generate a signal having a duty cycle based on a first voltage across the first diode and a second voltage across the second diode. At least one of such the embodiments includes a temperature calculator to calculate a value of temperature based at least in part on the duty cycle of the signal.

A 3D integrated circuit device, including: a first layer including first transistors, overlaid by a second layer including second transistors, overlaid by a third layer including third transistors, where the first layer, the second layer and the third layer are each thinner than 2 microns, where the first layer includes first circuits including at least one of the first transistors, where the second layer includes second circuits including at least one of the second transistors, and where the third layer includes a charge pump circuit and control circuits to control the first circuits and the second circuits.

In various embodiments, a measuring arrangement is provided. The measuring arrangement may include a micromechanical sensor including a capacitor, a bridge circuit including a plurality of capacitors, at least one capacitor of which is the capacitor of the micromechanical sensor, an amplifier coupled, on the input side, to an output of the bridge circuit, a DC voltage source configured to provide an electrical DC voltage, a chopper including at least one first charge store and a switch structure, The switch structure is configured to couple the first charge store alternately to the DC voltage and the bridge circuit for the purpose of coupling an electrical mixed voltage into the bridge circuit.

Various implementations described herein are directed to an integrated circuit. The integrated circuit may include core circuitry connected between a high voltage source and a low voltage source. The core circuitry may include multiple transistors including a first transistor of a first polarity type and a second transistor of a second polarity type that is different than the first polarity type. The integrated circuit may include voltage regulation circuitry connected between an external positive voltage source and ground. The voltage regulation circuitry may operate to provide the low voltage source to the core circuitry. The low voltage source may be equal to or higher than ground. The voltage regulation circuitry may further operate to body bias the multiple transistors with a single voltage that is applied to a body terminal of the first transistor and the second transistor.

A semiconductor switch device for switching an RF signal and a method of making the same. The device includes a first semiconductor region having a first conductivity type. The device also includes a source region and a drain region located in the first semiconductor region. The source region and the drain region have a second conductivity type. The second conductivity type is different to the first conductivity type. The device further includes a gate separating the source region from the drain region. The device also includes at least one sinker region having the second conductivity type. Each sinker region is connectable to an external potential for drawing minority carriers away from the source and drain regions to reduce a leakage current at junctions between the source and drain regions and the first semiconductor region.

An apparatus is provided to improve spin injection efficiency from a magnet to a spin orbit coupling material. The apparatus comprises: a first magnet; a second magnet adjacent to the first magnet; a first structure comprising a tunneling barrier; a third magnet adjacent to the first structure; a stack of layers, a portion of which is adjacent to the third magnet, wherein the stack of layers comprises spin-orbit material; and a second structure comprising magnetoelectric material, wherein the second structure is adjacent to the first magnet.

An electronic circuit according to one aspect of the present technology includes: an MOS circuit portion; and a stabilizing element portion. The MOS circuit portion includes a deep well. The stabilizing element portion includes a first element portion arranged between a power supply source and the deep well, and stabilizes a potential of the deep well.

A transistor device includes a first emitter region of a first doping type, a second emitter region of a second doping type, a body of the second doping type, a drift region of the first doping type, a field-stop region of the first doping type, at least one boost structure, and a gate electrode. The boost structure is arranged between the field-stop region and the second emitter region. The at least one boost structure includes a base region of the first doping type and at least one auxiliary emitter region of the second doping type separated from the second emitter region by the base region. An overall dopant dose in the drift region and the field-stop region in a current flow direction of the transistor device is higher than a breakthrough charge of a semiconductor material of the drift region and the field-stop region.

A transistor biasing circuit including a first controller configured to receive a sensor signal generated based on the performance of one or more transistors of a digital circuit and to compare the sensor signal with a reference signal and to generate a first biasing voltage control signal; a first actuator configured to generate a first biasing voltage based on the first biasing voltage control signal; a second actuator configured to generate a second biasing voltage based on a second biasing voltage control signal; and a second controller configured to generate the second biasing voltage control signal based on an intermediate voltage level generated based on the first and second biasing voltages.