An image sensor with embedded wells for accommodating light emitters includes a semiconductor substrate including an array of doped sensing regions respectively corresponding to an array of photosensitive pixels of the image sensor. The semiconductor substrate forms an array of wells. Each well is aligned with a respective doped sensing region to facilitate detection, by the photosensitive pixel that includes said respective doped sensing region, of light emitted to the photosensitive pixel by a light emitter disposed in the well. The image sensor further includes, between adjacent doped sensing regions, a light-blocking barrier to reduce propagation of light to the doped sensing-region of each photosensitive pixel from wells not aligned therewith.

An imaging device includes a first chip. The first chip includes a first pixel and a second pixel. The first pixel includes a first anode region and a first cathode region, and the second pixel includes a second anode region and a second cathode region. The first chip includes a first wiring layer. The first wiring layer includes a first anode electrode, a first anode via coupled to the first anode electrode and the first anode region, and a second anode via coupled to the first anode electrode and the second anode region.

Example embodiments relate to image sensors for time delay and integration imaging and methods for imaging using an array of photo-sensitive elements. One example image sensor for time delay and integration imaging includes an array of photo-sensitive elements that includes a plurality of photo-sensitive elements arranged in rows and columns of the array. Each photo-sensitive element includes an active layer configured to generate charges in response to incident light on the active layer. Each photo-sensitive element also includes a charge transport layer. Further, each photo-sensitive element includes at least a first and a second gate, each separated by a dielectric material from the charge transport layer. The array of photo-sensitive elements is configured such that the second gate of a first photo-sensitive element and the first gate of a second photo-sensitive element in a direction along a column of the array are configured to control transfer of charges.

An image sensor having a shield including, for example, a metal, is above an electrical charge storage element in a pixel region to block light incident toward the electrical charge storage element, thereby making it possible to reduce or prevent reading a charge value including leakage charge introduced to the electrical charge storage element, and thus adversely affecting an image result.

A pixel cell includes a nitrogen-implanted region at a semiconductor material-gate oxide proximate interface located in a region above a photodiode. The pixel cell is further devoid of implanted nitrogen in channel regions of a plurality of pixel transistors. Thus, Si—N bonds are formed at the semiconductor material-gate oxide interface in the region above the photodiode, while the channel regions are protected from nitrogen implantation at the semiconductor material-gate oxide interface. Methods of forming the pixel cell are also described.

A device for luminescent imaging includes an array of imaging pixels, a photonic structure over the array of imaging pixels, and an array of features over the photonic structure. A first feature of the array of features is over a first pixel of the array of imaging pixels, and a second feature of the array of features is over the first pixel and spatially displaced from the first feature. A first luminophore is within or over the first feature, and a second luminophore is within or over the second feature. The device includes a radiation source to generate first photons having a first characteristic at a first time, and generate second photons having a second characteristic at a second time. The first pixel selectively receives luminescence emitted by the first and second luminophores responsive to the first photons at the first time and second photons at the second time, respectively.

A solid-state imaging element that includes a semiconductor layer, a floating diffusion region (FD), a penetrating pixel separation region, and a non-penetrating pixel separation region. In the semiconductor layer, a visible-light pixel (PDc) that receives visible light and an infrared-light pixel (PDw) that receives infrared light are two-dimensionally arranged. The floating diffusion region is provided in the semiconductor layer and is shared by adjacent visible-light and infrared-light pixels. The penetrating pixel separation region is provided in a region excluding a region corresponding to the floating diffusion region in an inter-pixel region of the visible-light pixel and the infrared-light pixel, and penetrates the semiconductor layer in a depth direction. The non-penetrating pixel separation region is provided in the region corresponding to the floating diffusion region in the inter-pixel region, and reaches a midway part in the depth direction from the light receiving surface of the semiconductor layer.

The present technology relates to an imaging element and an electronic device capable of preventing light from leaking into an adjacent pixel. A semiconductor layer in which a first pixel in which a read pixel signal is used to generate an image, and a second pixel in which the read pixel signal is not used to generate an image are arranged, and a wiring layer stacked on the semiconductor layer are provided, and a structure of the first pixel and a structure of the second pixel are different. A first inter-pixel separation portion that separates the semiconductor layer of the adjacent first pixels, and a second inter-pixel separation portion that separates the semiconductor layer of the adjacent second pixels are further provided, and the first inter-pixel separation portion and the second inter-pixel separation portion are provided with different structures. The present technology can be applied to an imaging element in which dummy pixels are arranged.

A solid-state imaging element of a pixel sharing type with improved driving of transistors is disclosed. A first electric charge accumulating section and a second electric charge accumulating section are arranged in a predetermined direction. A first transfer section transfers electric charge from first photoelectric conversion elements to the first electric charge accumulating section, causing it to accumulate the electric charge. A second transfer section transfers electric charge from second photoelectric conversion elements to the second electric charge accumulating section, causing it to accumulate the electric charge. A first transistor is configured to output a signal corresponding to an amount of the electric charge accumulated in each of the first electric charge accumulating section and the second electric charge accumulating section. A second transistor is arranged with the first transistor in the predetermined direction and connected in parallel to the first transistor.

An imaging device includes a counter electrode, a photoelectric conversion layer that converts light into a signal charge, a plurality of sets of electrodes each of which collects the signal charge, each of the plurality of sets including a first electrode included in a high-sensitivity pixel and a second electrode included in a low-sensitivity pixel, and an auxiliary electrode which is located, as seen in plan view, between the first electrode and the second electrode in each of the plurality of sets and which is commonly included in the high-sensitivity pixel and the low-sensitivity pixel. The distance between the first electrode and the auxiliary electrode is different from the distance between the second electrode and the auxiliary electrode.