A sensor package structure includes a substrate, a sensor chip disposed on the substrate, several metal wires electrically connected to the substrate and the sensor chip, a translucent layer corresponding in position to the sensor chip, and an adhesive. A top surface of the sensor chip has a sensing region and a spacing region around the sensing region. The sensor chip includes several connecting pads arranged on a first portion of the top surface between the first edge and the spacing region, and a second portion of the top surface between the second edge and the spacing region is provided without any connecting pad. The width of the first portion is greater than that of the second portion. The adhesive covers the surrounding side of the sensor chip, the first portion, and the surrounding side of the translucent layer. Part of each metal wire is embedded in the adhesive.

A sensor package structure includes a substrate, a sensor chip disposed on the substrate, several metal wires electrically connected to the substrate and the sensor chip, a translucent layer corresponding in position to the sensor chip, a combining layer firmly fixing the translucent layer to the sensor chip, and a packaging compound. A top surface of the sensor chip has a sensing region and a spacing region around the sensing region. The sensor chip includes several connecting pads arranged on the top surface between at least part of the edges thereof and the spacing region. The translucent layer has a fixing region arranged outside a portion thereof adhered to the combining layer. The packaging compound covers the fixing region and the external sides of the sensor chip, the combining layer, and the translucent layer. Each metal wire is embedded in the combining layer and the packaging compound.

Disclosed are exemplary embodiments of systems and methods of applying thermal interface materials (TIMs). The thermal interface materials may be applied to a wide range of substrates and components, such as lids or integrated heat spreaders of integrated circuit (IC) packages, board level shields, heat sources (e.g., a central processing unit (CPU), etc.), heat removal/dissipation structures or components (e.g., a heat spreader, a heat sink, a heat pipe, a vapor chamber, a device exterior case or housing, etc.), etc.

An array imaging module includes a molded photosensitive assembly which includes a supporting member, at least a circuit board, at least two photosensitive units, at least two lead wires, and a mold sealer. The photosensitive units are coupled at the chip coupling area of the circuit board. The lead wires are electrically connected the photosensitive units at the chip coupling area of the circuit board. The mold sealer includes a main mold body and has two optical windows. When the main mold body is formed, the lead wires, the circuit board and the photosensitive units are sealed and molded by the main mold body of the mold sealer, such that after the main mold body is formed, the main mold body and at least a portion of the circuit board are integrally formed together at a position that the photosensitive units are aligned with the optical windows respectively.

Disclosed are semiconductor packages and methods of fabricating the same. The semiconductor package comprises a molding layer, a silicon layer on the molding layer, a glass upwardly spaced apart from the silicon layer, and a connection dam coupled to the silicon layer and connecting the silicon layer to the glass. The silicon layer includes a silicon layer body, a silicon layer via extending vertically in the silicon layer body, and a micro-lens array on a top surface of the silicon layer body. A bottom surface of the silicon layer body contacts a top surface of the molding layer. The molding layer includes a molding layer body, a molding layer via that extends vertically in the molding layer body and has electrical connection with the silicon layer via, and a connection ball connected to a bottom surface of the molding layer via.

A MEMS package including a fixed frame, a moveable platform and elastic restoring members is provided. The moveable platform is moved with respect to the fixed frame. The elastic restoring members are connected between the fixed frame and the moveable platform, and used to restore the moved moveable platform to an original position.

The present technology relates to a solid-state imaging device capable of suppressing flare in a CSP-type solid-state imaging device having a cavityless structure, a method of manufacturing the same, and an electronic device. The solid-state imaging device includes: a semiconductor substrate in which a photoelectric conversion section is formed for each pixel; an on-chip lens formed on a light incident surface side of the semiconductor substrate; a light-transmissive substrate that protects the on-chip lens; and a bonding resin that bonds the light-transmissive substrate and the on-chip lens together. A first surface on the light incident surface side of the light-transmissive substrate is flat, and a second surface opposite to the first surface of the light-transmissive substrate has different thicknesses in a central region facing a pixel region of the semiconductor substrate and an outer peripheral region outside the central region. The present technology can be applied to, for example, a CSP-type solid-state imaging device having a cavityless structure or the like.

A light detecting device is provided with: a filter array including filters arranged two-dimensionally, each of the filters having a light-incident surface and a light-emitting surface, the filters including multiple types of filters having mutually different transmission spectra; and an image sensor having a light-detecting surface facing the light-emitting surface, the image sensor being provided with light-detecting elements arranged two-dimensionally on the light-detecting surface, wherein the distance between the light-emitting surface and the light-detecting surface is different for each of the filters.

An imaging element package according to the present disclosure includes a circuit board, an imaging element substrate, and a light-transmissive substrate. The imaging element substrate is stacked on the circuit board. The light-transmissive substrate is stacked on the imaging element substrate via a void by an adhesive member provided on the peripheral edge of the light receiving surface of the imaging element substrate, and has higher heat resistance than the imaging element substrate. The imaging element package further includes a frame-shaped frame body stacked on the circuit board. The imaging element substrate and the light-transmissive substrate are housed in a region surrounded by the frame body.

Restrictions in placement of an antenna for performing transmission and reception of a signal by wireless communication when the antenna is used together with a CSP (Chip Size Package) are eliminated. A semiconductor device includes a chip size package and a substrate. The chip size package includes a semiconductor element. Further, the chip size package includes a connection portion that electrically connects the semiconductor element and an outside to each other. The substrate includes an antenna connected to the connection portion of the chip size package for performing transmission and reception of a signal by wireless communication. With this configuration, the semiconductor device performs transmission and reception of a signal to and from the outside through the antenna provided on the substrate.