Disclosed are semiconductor packages and methods of fabricating the same. The semiconductor package comprises a molding layer, a silicon layer on the molding layer, a glass upwardly spaced apart from the silicon layer, and a connection dam coupled to the silicon layer and connecting the silicon layer to the glass. The silicon layer includes a silicon layer body, a silicon layer via extending vertically in the silicon layer body, and a micro-lens array on a top surface of the silicon layer body. A bottom surface of the silicon layer body contacts a top surface of the molding layer. The molding layer includes a molding layer body, a molding layer via that extends vertically in the molding layer body and has electrical connection with the silicon layer via, and a connection ball connected to a bottom surface of the molding layer via.

An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.

An image sensor includes: a pixel that generates a pixel signal based upon incident light having entered therein; and a generation unit that includes a first input unit to which the pixel signal is input, a second input unit to which a first reference signal with a shifting voltage is input, and an output unit that outputs an output signal generated based upon the pixel signal and the first reference signal, wherein: the generation unit further includes a first capacitance disposed between the first input unit and the output unit, a second capacitance disposed between the second input unit and the output unit, and a third capacitance connected to either one of the first capacitance and the second capacitance.

An image sensor package includes an image sensor chip on a package substrate, a logic chip on the package substrate and perpendicularly overlapping the image sensor chip, and a memory chip on the package substrate and perpendicularly overlapping the image sensor chip and logic chip. The logic chip processes a pixel signal output from the image sensor chip. The memory chip is electrically connected to the image sensor chip through a conductive wire and stores at least one of the pixel signal from the image sensor chip or a pixel signal processed by the logic chip. The memory chip receives the pixel signal output from the image sensor chip through the conductive wire and receives the pixel signal processed by the logic chip through the image sensor chip and the conductive wire.

In one example, an imaging device including a plurality of pixel circuits, a first control line, a second control line, a first voltage supply line, a second voltage supply line, a first light-receiving element, and a diagnosis unit is disclosed. The pixel circuits each include a first terminal, a second terminal, a third terminal, an accumulation unit, a first transistor, a second transistor, and an output unit. The first transistor is couples the third terminal to the accumulation unit on the basis of a voltage of the first terminal. The second transistor supplies a predetermined voltage to the accumulation unit on the basis of a voltage of the second terminal. The output unit outputs a signal corresponding to a voltage in the accumulation unit.

There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.

The present disclosure relates to a solid-state imaging device, a manufacturing method thereof, and an electronic apparatus, in which both oblique light characteristics and sensitivity can be improved. The solid-state imaging device includes pixel array unit in which a plurality of pixels is two-dimensionally arranged in a matrix and multi-stage light shielding walls are provided between the pixels. The present disclosure is applicable to, for example, a back-illuminated type solid-state imaging device and the like.

A metal-dielectric bonding method includes providing a first semiconductor structure including a first semiconductor layer, a first dielectric layer on the first semiconductor layer, and a first metal layer on the first dielectric layer, where the first metal layer has a metal bonding surface facing away from the first semiconductor layer; planarizing the metal bonding surface; applying a plasma treatment on the metal bonding surface; providing a second semiconductor structure including a second semiconductor layer, and a second dielectric layer on the second semiconductor layer, where the second dielectric layer has a dielectric bonding surface facing away from the second semiconductor layer; planarizing the dielectric bonding surface; applying a plasma treatment on the dielectric bonding surface; and bonding the first semiconductor structure with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface.

Provided are an image sensor and a detection system using same, which belong to the field of semiconductor image sensors. The image sensor includes: a first substrate, wherein the first substrate at least includes a photoelectric unit for photoelectric conversion, and N signal transmission channels which are connected to the photoelectric unit, with N being greater than or equal to 1; and a second substrate, which includes N second charge storage units which correspond to the N transmission channels. The transmission channels receive control signals, electrically communicate the photoelectric unit and the second charge storage units, and transfer at least some photo-induced electrons, which are generated in the photoelectric unit, to the second charge storage units. The effect of miniaturization and high integration design of pixels is ensured by means of stacking two substrates; and by means of further providing charge storage units on both of the two substrates, the area of the peripheral region of the pixels can be used, the effect of a higher charge storage amount can be achieved, and the effects such as measurement accuracy can be ensured.

The present disclosure describes a throughput-scalable image sensing system for analyzing biological or chemical samples is provided. The system includes a plurality of image sensors configured to detect at least a portion of light emitted as a result of analyzing the biological or chemical samples. The plurality of image sensors is arranged on a plurality of wafer-level packaged semiconductor dies of a single semiconductor wafer. Each image sensor of the plurality of image sensors is disposed on a separate packaged semiconductor die of the plurality of packaged semiconductor dies. Neighboring packaged semiconductor dies are separated by a dicing street; and the plurality of packaged semiconductor dies and a plurality of dicing streets are arranged such that the plurality of packaged semiconductor dies can be diced from the single semiconductor wafer as a group.