Image sensors may include backside illuminated global shutter pixels that are implemented using stacked substrates. To provide high dynamic range in the pixels, only a predetermined portion of charge that has been generated in the pixel photodiodes is kept and stored in the pixel photodiodes when the pixels are illuminated by high light levels. In the low light level illumination conditions, all of the accumulated charge is stored in the pixel photodiodes, thereby preserving high sensitivity and low noise. Dynamic charge overflow may be used to increase the high dynamic range. To achieve low noise operation in a global shutter scanning mode, dynamic charge overflow may be combined with correlated double sampling techniques. Dynamic charge overflow may be achieved using a transistor-based overflow device or using an n-p-n based overflow device.

Some embodiments relate to an integrated circuit, comprising: a pixel, comprising: a photodetection region; and a drain configured to discard charge carriers from within a semiconductor region of the pixel outside of the photodetection region. Some embodiments relate to an integrated circuit, comprising: a pixel, comprising: a photodetection region; and a drain configured to discard charge carriers from the photodetection region, wherein the drain comprises a semiconductor region and the semiconductor region is contacted by a metal contact. Some embodiments relate to an integrated circuit, comprising: a pixel, comprising: a photodetection region; and a drain configured to discard charge carriers from the photodetection region, wherein the drain comprises a semiconductor region that to which electrical contact is made through a conductive path that does not include a polysilicon electrode.

A backside illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor array may operate in a rolling shutter scanning mode. The CMOS image sensor may use chip stacking technology with chip-to-chip electrical connections between the top image sensing chip and carrier chip pixel circuits. Each chip-to-chip connection may electrically connect groups of pixels at floating diffusion nodes to a readout circuit. This arrangement allows for small, submicron sized pixels to be formed while using bonding pads that have a larger size. The top light sensing chip pixels do not have transfer gates for lateral charge transfer from photodiodes to the floating diffusion regions. The charge transfer from the photodiode regions is accomplished using a charge punch through technique in a vertical direction. This type of arrangement allows for submicron size pixels in a very large sensor array.

A semiconductor device includes a semiconductor substrate, a radiation-sensing region, at least one isolation structure, and a doped passivation layer. The radiation-sensing region is present in the semiconductor substrate. The isolation structure is present in the semiconductor substrate and adjacent to the radiation-sensing region. The doped passivation layer at least partially surrounds the isolation structure in a substantially conformal manner.

An imaging device includes a plurality of unit pixels disposed into pixel groups that are separated from one another by isolation structures. Unit pixels within each pixel group are separated from one another by isolation structures and share circuit elements. The isolation structures between pixel groups are full thickness isolation structures. At least a portion of the isolation structures between unit pixels within a pixel group are deep trench isolation structures.

The present disclosure relates to a CMOS image sensor having a doped isolation structure separating a photodiode and a pixel device, and an associated method of formation. In some embodiments, the CMOS image sensor has a doped isolation structure separating a photodiode and a pixel device. The photodiode is arranged within the substrate away from a front-side of the substrate. A pixel device is disposed at the front-side of the substrate overlying the photodiode and is separated from the photodiode by the doped isolation structure. Comparing to previous image sensor designs, where an upper portion of the photodiode is commonly arranged at a top surface of a front-side of the substrate, now the photodiode is arranged away from the top surface and leaves more room for pixel devices. Thus, a larger pixel device can be arranged in the sensing pixel, and short channel effect and noise level can be improved.

An image sensor may include an array of image sensor pixels. Each pixel in the array may be a global shutter pixel having a first charge storage node configured to capture scenery information and a second charge storage node configured to capture background information generated as a result of parasitic light and dark noise signals. The first and/or second charge storage nodes may each be provided with an overflow charge storage to provide high dynamic range (HDR) functionality. The background information may be subtracted from the scenery information to cancel out the desired background signal contribution and to obtain an HDR signal with high global shutter efficiency. The charge storage nodes may be implemented as storage diode or storage gate devices. The pixels may be backside illuminated pixels with optical diffracting structures and multiple microlenses formed at the backside to distribute light equally between the two charge storage nodes.

An imaging device includes a pixel, the pixel including a photoelectric converter which converts light into a signal charge and a charge detection circuit which detects the signal charge. The photoelectric converter includes a photoelectric conversion layer having a first surface and a second surface opposite to the first surface, a pixel electrode on the first surface, a first electrode adjacent to the pixel electrode on the first surface, the first electrode being electrically conductive to the photoelectric conversion layer, and a counter electrode on the second surface, the counter electrode facing the pixel electrode and the first electrode. A shortest distance between the pixel electrode and the first electrode in a plan view is smaller than a shortest distance between the pixel electrode and the first electrode.

An image sensor including a substrate having a first, a first device isolation region adjacent to the first surface and defining a unit pixel, a transfer gate on the first surface at an edge of the unit pixel, a photoelectric conversion part in the substrate and adjacent to a first side surface of the transfer gate, and a floating diffusion region in the substrate and adjacent to a second side surface of the transfer gate. The second side surface faces the first side surface. The first device isolation region is spaced apart from the second side surface. The substrate and the first device isolation region are doped with impurities having a first conductivity. A first impurity concentration of the first device isolation region is greater than a second impurity concentration of the substrate.

A pixel includes a photodiode, a first transfer gate, a second transfer gate, and a floating diffusion. The pixel may include a storage gate, and the first transfer gate may be controllable to transfer charge from the photodiode to an area under the storage gate. The storage gate is controllable to store the charge in the area under the storage gate and to transfer the charge from the area under the storage gate. The first transfer gate may be controllable among a first biasing condition in which charge is transferable to an area under the first transfer gate, a second biasing condition in which the charge is storable in the area under the first transfer gate, and a third biasing condition in which the charge is transferable out of the area under the first transfer gate. The second transfer gate is controllable to transfer charge to the floating diffusion.