A semiconductor device includes a semiconductor substrate, a radiation-sensing region, at least one isolation structure, and a doped passivation layer. The radiation-sensing region is present in the semiconductor substrate. The isolation structure is present in the semiconductor substrate and adjacent to the radiation-sensing region. The doped passivation layer at least partially surrounds the isolation structure in a substantially conformal manner.

A CMOS image sensor includes a semiconductor substrate, a plurality of pixel regions in the semiconductor substrate, a deep trench disposed between two adjacent pixel regions and filled with a polysilicon layer doped a first conductivity type, a plurality of well regions having a second conductivity type in each of the pixel regions, a through hole connected to the polysilicon material, and an metal interconnect layer connected to the through hole. The deep trench filled with the doped polysilicon layer completely isolates adjacent pixel regions. A voltage applied to the metal interconnect layer extracts excess photoelectrons generated by intensive incident light to improve the performance of the CMOS image sensor.

An image sensor including a substrate having a first, a first device isolation region adjacent to the first surface and defining a unit pixel, a transfer gate on the first surface at an edge of the unit pixel, a photoelectric conversion part in the substrate and adjacent to a first side surface of the transfer gate, and a floating diffusion region in the substrate and adjacent to a second side surface of the transfer gate. The second side surface faces the first side surface. The first device isolation region is spaced apart from the second side surface. The substrate and the first device isolation region are doped with impurities having a first conductivity. A first impurity concentration of the first device isolation region is greater than a second impurity concentration of the substrate.

Implementations of pixels may include a photodiode layer including a photodetector and two or more silicon based circular transistors and an interconnect layer coupled to the photodiode layer. The interconnect layer may include an amorphous oxide semiconductor (AOS) transistor operatively coupled with the two or more silicon based circular transistors.

The present technology relates to a solid-state imaging device capable of suppressing deterioration in dark characteristics, and an electronic apparatus. The present invention is provided with: a photoelectric conversion section that performs photoelectric conversion; a charge retaining section that temporarily retains electric charge converted by the photoelectric conversion section; and a first trench formed in a semiconductor substrate between the photoelectric conversion section and the charge retaining section, the first trench being higher than the photoelectric conversion section in a depth direction of the semiconductor substrate. Alternatively, the first trench is lower than the photoelectric conversion section and higher than the charge retaining section in the depth direction of the semiconductor substrate. The present technology can be applied to, for example, a back-illuminated CMOS image sensor.

Image sensors may include an array of pixels each having nested sub-pixels. Nested sub-pixels may include an inner photosensitive region and an outer photosensitive region. Inner photosensitive regions of pixels in an array may be provided with a respective local vertical transfer gate structure formed in a trench that laterally surrounds the inner photosensitive region. A trench structure may be formed in a grid-like pattern having gaps in which the nested sub-pixels are formed. The trench structure may be coupled to outer photosensitive regions of each of the pixels in the array. The trench structure may be a global vertical transfer gate structure. The vertical transfer gate structures provided to the pixels may allow for accumulated charges to be transferred to respective charge storage nodes associated with the photosensitive regions in any given pixel. Image sensors formed in this way may be used in rolling shutter or global shutter configurations.

The semiconductor photodetector device comprises a substrate of semiconductor material of a first type of electric conductivity, an epitaxial layer of an opposite second type of electric conductivity, a further epitaxial layer of the first type of electric conductivity and photodetectors. The epitaxial layer functions as a shielding layer for charge carriers (e.sup., h.sup.+ generated by radiation that is incident from a rear side opposite the photodetectors.

An image sensor is provided. The image sensor may include first to fourth unit pixels. The first unit pixel includes a first photodiode, a first transfer gate, and a first floating diffusion region, and the second unit pixel includes a second photodiode, a second transfer gate, and a second floating diffusion region, and the third unit pixel includes a third photodiode, a third transfer gate, and a third floating diffusion region, and the fourth unit pixel includes a fourth photodiode, a fourth transfer gate, and a fourth floating diffusion region. The first photodiode and the third photodiode may be N-type photodiodes. The second photodiode and the fourth photodiode may be P-type photodiodes.

Image sensors may include backside illuminated global shutter pixels that are implemented using stacked substrates. To provide high dynamic range in the pixels, only a predetermined portion of charge that has been generated in the pixel photodiodes is kept and stored in the pixel photodiodes when the pixels are illuminated by high light levels. In the low light level illumination conditions, all of the accumulated charge is stored in the pixel photodiodes, thereby preserving high sensitivity and low noise. Dynamic charge overflow may be used to increase the high dynamic range. To achieve low noise operation in a global shutter scanning mode, dynamic charge overflow may be combined with correlated double sampling techniques.

An image sensor may include an array of image sensor pixels. Each image sensor pixel in the array may be a global shutter pixel that includes first transistors and second transistors that are substantially larger than the first transistors. The second transistors may receive row control signals from peripheral row drivers formed at the edge of the array. Each pixel may further include local driver circuits interposed between the peripheral row drivers and the second transistors. Each local driver circuit may include a pull-down transistor for driving a row control signal low and a pull-up transistor for driving the row control signal high. Each local driver may optionally be shared among two or more adjacent pixels in a given row. The local drivers help reduce the total capacitive loading at the output of the peripheral row drivers and can therefore help improve row driver performance and minimize integration time.