A method includes providing a semiconductor substrate having a front side surface and a back side surface opposite to the front side surface. A photosensitive region of the semiconductor substrate is etched to form a recess. A semiconductor material is deposited on the semiconductor substrate to form a radiation sensing member filling the recess. The semiconductor material has an optical band gap energy smaller than 1.77 eV. A device layer is formed over the front side surface of the semiconductor substrate and the radiation sensing member. A trench isolation is formed in an isolation region of the semiconductor substrate and extending from the back side surface of the semiconductor substrate.

SiGe photodiode for crosstalk reduction. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor material. Each pixel includes a plurality of photodiodes. The plurality of pixels are configured to receive an incoming light through an illuminated surface of the semiconductor material. Each pixel includes a first photodiode comprising a silicon (Si) material; and a second photodiode having the Si material and a silicon germanium (SiGe) material.

An image sensor includes a substrate including a plurality of pixel regions and one or more pairs of dummy pixel regions; a pixel separation structure between two adjacent pixel regions among the plurality of pixel regions and including a first conductive layer; a dummy pixel separation structure between the one or more pairs of dummy pixel regions, electrically connected to the pixel separation structure, and including a second conductive layer; and a pixel separation contact disposed on the dummy pixel separation structure.

A manufacturing method of an image sensor including the following steps is provided. A substrate is provided. A light sensing device is formed in the substrate. A storage node is formed in the substrate. The storage node and the light sensing device are separated from each other. A buried gate structure is formed in the substrate. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. A first light shielding layer is formed on the buried gate. The first light shielding layer is located above the storage node and electrically connected to the buried gate.

Techniques for realizing compound semiconductor (CS) optoelectronic devices on silicon (Si) substrates are disclosed. The integration platform is based on heteroepitaxy of CS materials and device structures on Si by direct heteroepitaxy on planar Si substrates or by selective area heteroepitaxy on dielectric patterned Si substrates. Following deposition of the CS device structures, device fabrication steps can be carried out using Si complimentary metal-oxide semiconductor (CMOS) fabrication techniques to enable large-volume manufacturing. The integration platform can enable manufacturing of optoelectronic module devices including photodetector arrays for image sensors and vertical cavity surface emitting laser arrays. Such module devices can be used in various applications including light detection and ranging (LIDAR) systems for automotive and robotic vehicles as well as mobile devices such as smart phones and tablets, and for other perception applications such as industrial vision, artificial intelligence (AI), augmented reality (AR) and virtual reality (VR).

[Object] There are provided a solid-state imaging device that can minimize a decrease in layout efficiency due to trenches and a method of producing the same.

[Solution] A solid-state imaging device of the present disclosure includes a substrate including one or more vertical trenches extending in a longitudinal direction and a horizontal trench that extends in a lateral direction and is connected to the one or more vertical trenches, wherein the horizontal trench is provided between a photoelectric conversion unit and a charge holding unit in the substrate and includes a light-blocking film, and wherein the one or more vertical trenches include a first trench having a first width and including the light-blocking film, and a second trench having a second width narrower than the first width and not including the light-blocking film, or a third trench including a first part having a third width and including the light-blocking film and a second part having a fourth width narrower than the third width and not including the light-blocking film.

An image sensor is provided. The image sensor includes a substrate, a photodiode, and a storage node. The photodiode is disposed in the substrate and close to a first end of the substrate. The storage node is disposed in the substrate, adjacent to the photodiode, and close to the first end of the substrate. The image sensor further includes a first isolation structure, a first light shielding structure, an interlayer dielectric layer, and a lens structure. The first isolation structure is disposed in the substrate and over the storage node. The first light shielding structure is disposed in the first isolation structure. The interlayer dielectric layer is disposed over a second end of the substrate. The second end is opposite the first end. The lens structure is disposed over the interlayer dielectric layer.

An image sensor includes: a substrate having a first surface on which light is incident and a second surface opposite to the first surface; a pixel isolation structure enclosing a pixel region in the substrate; a photoelectric conversion region in the pixel region; and a device isolation layer defining a pattern in the pixel region, wherein the device isolation layer includes a first portion contacting the pixel isolation structure and a second portion spaced apart from the pixel isolation structure, the device isolation layer extends from a second surface of the substrate into the substrate, and a length of the second portion of the device isolation layer in a vertical direction perpendicular to the first surface of the substrate is less than a length of the first portion of the device isolation layer in the vertical direction.

Aspects of the technology described herein relate to improved semiconductor-based image sensor designs. In some embodiments, an integrated circuit may comprise a plurality of photodetection regions and one or more intermediate regions between the photodetection regions. In some embodiments, the intermediate regions may comprise bulk semiconductor material that facilitates a transfer of noise charge carriers from the intermediate regions to drain regions associated with each photodetection region. In some embodiments, a drain device may be configured with a gate controlling the flow of charge carriers from the intermediate regions and photodetection regions to drain regions. In some embodiments, an integrated circuit may comprise an array of pixels and a control circuit configured to control a transfer of charge carriers in the array of pixels.

The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. The substrate has a plurality of protrusions disposed along a first side of the substrate over the image sensing element and a ridge disposed along the first side of the substrate. The ridge continuously extends around the plurality of protrusions.