Methods of forming trench structures of different depths in a semiconductor substrate are provided. A first mask forming a first opening and a second opening is provided on the semiconductor substrate. The semiconductor substrate is etched through the first and second openings, thereby forming a first trench and a second trench. Trench structure material is deposited in the first and second trenches, thereby forming first and second trench structures. A second mask is provided on the first mask, wherein the second mask covers the first opening and has a third opening superimposed over the second opening of the first mask. The second trench structure is etched through the second opening of the first mask and through the third opening of the second mask.

A method includes following steps. A first III-V compound layer is epitaxially grown over a semiconductive substrate. The first III-V compound layer has an energy gap in a gradient distribution. A source/drain contact is formed over the first III-V compound layer. A gate structure is formed over the first III-V compound layer.

A semiconductor device, a semiconductor device manufacturing method, and an image capturing device capable of suppressing variations in transistor characteristics. The semiconductor device includes a semiconductor substrate, and a field effect transistor. The field effect transistor includes a semiconductor region having a channel, a gate electrode covering the semiconductor region, and a gate insulating film. The semiconductor region has a top face, and a first side face at one side of the top face in a gate width direction of the gate electrode. The gate electrode has a first part facing the top face over the gate insulating film, and a second part facing the first side face over the gate insulating film. A first end face of the first part and a second end face of the second part are flush at at least one end of the gate electrode in a gate length direction.

Disclosed is a CMOS image sensor with global shutters and a method for fabricating the CMOS image sensor. In one embodiment, a semiconductor device, includes: a light-sensing region; a charge-storage region; a light-shielding structure; and at least one via contact; wherein the charge-storage region is spatially configured adjacent to the light-sensing region in a lateral direction, wherein the light-shielding structure is configured over the charge-storage region in a vertical direction so as to prevent incident light leaking from the light-sensing region to the signal-processing region, wherein the light-shielding structure is configured in an interlayer dielectric (ILD) layer, and wherein the light-shielding structure is simultaneously formed with the at least one via contact.

An image sensor includes: photodiodes arranged in a substrate; active pillars connected to the photodiodes and extending in a vertical direction perpendicular to a bottom surface of the substrate; at least two transistors stacked in the vertical direction, wherein portions of the active pillars are channel areas of the at least two transistors; a floating diffusion (FD) area disposed under a transfer transistor, which is one of the at least two transistors, wherein the FD area is configured to receive charge from the photodiode through the transfer transistor and the portions of the active pillars; and a light transmitting layer disposed on a top surface of the substrate.

An amplifier transistor within an image-sensor pixel is implemented upside down relative to conventional orientation such that a substrate-resident floating diffusion node of the pixel forms the gate of the amplifier transistor—achieving increased pixel conversion gain by eliminating the conventional metal-layer interconnection between the floating diffusion node and amplifier-transistor gate and concomitant parasitic capacitance.

An image sensor includes a substrate including a plurality of pixels and having a first surface and a second surface opposite to the first surface, a photoelectric conversion portion disposed in the substrate in each of the pixels, a transfer gate disposed on the first surface of the substrate in each of the pixels, a first interlayer insulating layer covering the substrate and the transfer gate, a first hydrogen blocking layer disposed on the first interlayer insulating layer, a first active pattern disposed on the first hydrogen blocking layer and including a metal oxide doped with nitrogen, a first gate disposed on the first active pattern, a second interlayer insulating layer covering the first gate and the first active pattern, and upper source/drain contacts penetrating the second interlayer insulating layer and contacting the first active pattern at two sides of the first gate.

A semiconductor arrangement is provided. The semiconductor arrangement includes a first component in a substrate. The semiconductor arrangement includes a gap fill layer. A first portion of the gap fill layer overlies the first component. The first portion of the gap fill layer has a tapered sidewall. A first portion of the substrate separates the first portion of the gap fill layer from the first component.

A detection device includes a plurality of detection elements arranged in a matrix having a row-column configuration in a detection region, a plurality of scan lines coupled to the detection elements arranged in a first direction, a plurality of output signal lines that are coupled to the detection elements arranged in a second direction different from the first direction, and to which the detection elements output detection signals, a detection circuit configured to be supplied with the detection signals through the output signal lines, and a control circuit configured to output at least selection signals for switching between selection and non-selection of the output signal lines to supply the detection signals to the detection circuit. The control circuit is configured to discharge an electric charge of each of the non-selected output signal lines different from the selected output signal lines.

Disclosed are image sensors and methods of fabricating the same. The image sensor comprises a substrate including a plurality of pixels, a photoelectric conversion region in the substrate at each of the pixels, a gate electrode on the substrate at each of the pixels, an interlayer dielectric layer on the substrate and the gate electrode, and a contact penetrating the interlayer dielectric layer and on the gate electrode. The contact includes a lower part on the gate electrode and an upper part on the lower part and connected to a wiring line on the interlayer dielectric layer. A planar shape of the lower part of the contact is larger than that of the upper part of the contact.