A sensor package structure includes a substrate, a sensor chip disposed on the substrate, several metal wires electrically connected to the substrate and the sensor chip, a translucent layer corresponding in position to the sensor chip, and an adhesive. A top surface of the sensor chip has a sensing region and a spacing region around the sensing region. The sensor chip includes several connecting pads arranged on a first portion of the top surface between the first edge and the spacing region, and a second portion of the top surface between the second edge and the spacing region is provided without any connecting pad. The width of the first portion is greater than that of the second portion. The adhesive covers the surrounding side of the sensor chip, the first portion, and the surrounding side of the translucent layer. Part of each metal wire is embedded in the adhesive.

A sensor package structure includes a substrate, a sensor chip disposed on the substrate, several metal wires electrically connected to the substrate and the sensor chip, a translucent layer corresponding in position to the sensor chip, a combining layer firmly fixing the translucent layer to the sensor chip, and a packaging compound. A top surface of the sensor chip has a sensing region and a spacing region around the sensing region. The sensor chip includes several connecting pads arranged on the top surface between at least part of the edges thereof and the spacing region. The translucent layer has a fixing region arranged outside a portion thereof adhered to the combining layer. The packaging compound covers the fixing region and the external sides of the sensor chip, the combining layer, and the translucent layer. Each metal wire is embedded in the combining layer and the packaging compound.

An array imaging module includes a molded photosensitive assembly which includes a supporting member, at least a circuit board, at least two photosensitive units, at least two lead wires, and a mold sealer. The photosensitive units are coupled at the chip coupling area of the circuit board. The lead wires are electrically connected the photosensitive units at the chip coupling area of the circuit board. The mold sealer includes a main mold body and has two optical windows. When the main mold body is formed, the lead wires, the circuit board and the photosensitive units are sealed and molded by the main mold body of the mold sealer, such that after the main mold body is formed, the main mold body and at least a portion of the circuit board are integrally formed together at a position that the photosensitive units are aligned with the optical windows respectively.

Disclosed are semiconductor packages and methods of fabricating the same. The semiconductor package comprises a molding layer, a silicon layer on the molding layer, a glass upwardly spaced apart from the silicon layer, and a connection dam coupled to the silicon layer and connecting the silicon layer to the glass. The silicon layer includes a silicon layer body, a silicon layer via extending vertically in the silicon layer body, and a micro-lens array on a top surface of the silicon layer body. A bottom surface of the silicon layer body contacts a top surface of the molding layer. The molding layer includes a molding layer body, a molding layer via that extends vertically in the molding layer body and has electrical connection with the silicon layer via, and a connection ball connected to a bottom surface of the molding layer via.

An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.

In one example, an imaging device including a plurality of pixel circuits, a first control line, a second control line, a first voltage supply line, a second voltage supply line, a first light-receiving element, and a diagnosis unit is disclosed. The pixel circuits each include a first terminal, a second terminal, a third terminal, an accumulation unit, a first transistor, a second transistor, and an output unit. The first transistor is couples the third terminal to the accumulation unit on the basis of a voltage of the first terminal. The second transistor supplies a predetermined voltage to the accumulation unit on the basis of a voltage of the second terminal. The output unit outputs a signal corresponding to a voltage in the accumulation unit.

There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.

A metal-dielectric bonding method includes providing a first semiconductor structure including a first semiconductor layer, a first dielectric layer on the first semiconductor layer, and a first metal layer on the first dielectric layer, where the first metal layer has a metal bonding surface facing away from the first semiconductor layer; planarizing the metal bonding surface; applying a plasma treatment on the metal bonding surface; providing a second semiconductor structure including a second semiconductor layer, and a second dielectric layer on the second semiconductor layer, where the second dielectric layer has a dielectric bonding surface facing away from the second semiconductor layer; planarizing the dielectric bonding surface; applying a plasma treatment on the dielectric bonding surface; and bonding the first semiconductor structure with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface.

The present disclosure describes a throughput-scalable image sensing system for analyzing biological or chemical samples is provided. The system includes a plurality of image sensors configured to detect at least a portion of light emitted as a result of analyzing the biological or chemical samples. The plurality of image sensors is arranged on a plurality of wafer-level packaged semiconductor dies of a single semiconductor wafer. Each image sensor of the plurality of image sensors is disposed on a separate packaged semiconductor die of the plurality of packaged semiconductor dies. Neighboring packaged semiconductor dies are separated by a dicing street; and the plurality of packaged semiconductor dies and a plurality of dicing streets are arranged such that the plurality of packaged semiconductor dies can be diced from the single semiconductor wafer as a group.

Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.