PbO-based photoconductive X-ray imaging devices are disclosed in which the PbO photoconductive layer exhibits an amorphous crystal structure. According to selected embodiments, the amorphous PbO photoconductive layer may be formed by providing a substrate inside an evacuated evaporation chamber and evaporating lead oxide to deposit a photoconductive lead oxide layer onto the substrate, while subjecting the photoconductive layer to ion bombardment with oxygen ions having an ion energy between 25 and 100 eV. X-ray direct detection imaging devices formed from such amorphous PbO photoconductive layers are shown to exhibit image lag that is suitable for fluoroscopic imaging.

An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.

This technology relates to an image sensor. The image sensor may include a substrate including a photoelectric conversion element; a pillar formed over the photoelectric conversion element and having a concave-convex sidewall; a channel film formed along a surface of the pillar and for having at least one end coupled to the photoelectric conversion element; and a transfer gate formed over the channel film.

An embodiment of the present invention provides a manufacturing method of an amorphous-silicon flat-panel X-ray sensor; the method reduces the number of mask plates to be used, simplifies the production processes, saves production costs, while also improving the product yield. The manufacturing method comprises: on a substrate, after a gate scan line is formed, forming a data line, a TFT switch element and a photosensitive element through one patterning process, wherein on the mask plate used in the patterning process, a region corresponding to a channel of the TFT switch element is semi-transmissive, whereas regions respectively corresponding to the data line, the photosensitive element and the portion of the TFT switch element other than the channel thereof are non-transmissive; thereafter, on the substrate formed with the TFT switch element and the photosensitive element, a passivation layer and a bias line are formed.

A method of fabricating a pixelated imager and structure including a substrate with a bottom contact layer and active element blanket layers deposited on the bottom contact layer. The blanket layers are separated into an array of active elements with trenches isolating adjacent active elements in the array. A dielectric passivation/planarization layer is positioned over the array of active elements. An array of active element readout circuits overlies the passivation/planarization layer above the trenches with one active element readout circuit coupled to each active element of the array of active elements. Each active element and coupled active element readout circuit defines a pixel and the array of active elements and the coupled array of active element readout circuits defines a pixelated imager, and the readout circuit coupled to each active element includes at least one TFT with an active channel comprising a metal-oxide semiconductor material.

A method of manufacturing an sensor array includes providing a glass substrate; forming a bottom electrode layer over the glass substrate; forming a sensor material layer over the bottom electrode layer; forming a top electrode layer over the sensor material layer; patterning the top electrode layer, the sensor material layer, and the bottom electrode layer using a first photoresist layer to form a plurality of pixels; detecting a defect in the plurality of pixels; and patterning the plurality of pixels using a second photoresist layer. The first photoresist layer includes a plurality of first pixel patterns and the second photoresist layer comprises a plurality of second pixel patterns, and wherein at least one of the second pixel patterns has an area greater than that of a corresponding first pixel pattern.

A digital x-ray detector comprises a substrate, gate and data lines on the substrate to have the lines intersect each other to form a pixel domain, a thin film transistor within the pixel domain and adjacent to a portion where the gate and data lines intersect each other, the thin film transistor including gate, source, and drain electrodes and an active layer, a PIN diode within the pixel domain and including a lower electrode connected to the source electrode of the thin film transistor, a PIN layer on the lower electrode, and an upper electrode on the PIN layer, a bias line connected to the upper electrode of the PIN diode, and a scintillator disposed above the PIN diode. An aperture hole is formed on a plate surface of the upper electrode to transmit a visible ray from the scintillator directly towards the PIN layer.

Imaging apparatus (2000, 2100, 2200) includes a photosensitive medium (2004, 2204) and an array of pixel circuits (302), which are arranged in a regular grid on a semiconductor substrate (2002) and define respective pixels (2006, 2106) of the apparatus. Pixel electrodes (2012, 2112, 2212) are connected respectively to the pixel circuits in the array and coupled to read out photocharge from respective areas of the photosensitive medium to the pixel circuits. The pixel electrodes in a peripheral region of the array are spatially offset, relative to the regular grid, in respective directions away from a center of the array.

Some embodiments of the present disclosure relate to a deep trench isolation structure. This deep trench isolation structure is formed on a semiconductor substrate having an upper semiconductor surface. A deep trench, which has a deep trench width as measured between opposing deep trench sidewalls, extends into the semiconductor substrate beneath the upper semiconductor surface. A fill material is formed in the deep trench, and a dielectric liner is disposed on a lower surface and sidewalls of the deep trench to separate the fill material from the semiconductor substrate. A shallow trench region has sidewalls that extend upwardly from the sidewalls of the deep trench to the upper semiconductor surface. The shallow trench region has a shallow trench width that is greater than the deep trench width. A dielectric material fills the shallow trench region and extends over top of the conductive material in the deep trench.

A system includes a pixel including a diffusion layer in contact with an absorption layer. A transparent conductive oxide (TCO) is electrically connected to the diffusion layer. An overflow contact is in electrical communication with the TCO. The overflow contact can be spaced apart laterally from the diffusion layer. The pixel can be one of a plurality of similar pixels arranged in a grid pattern, wherein each pixel has a respective overflow contact, forming an overflow contact grid offset from the grid pattern.