A semiconductor device includes a semiconductor body having an active area with active transistor cells. Each active transistor cell includes a columnar trench having a field plate and a mesa. An edge termination region that laterally surrounds the active area includes a transition region, an outer termination region, and inactive cells arranged in the transition region and outer termination region. Each inactive cell includes a columnar termination trench having a field plate and a termination mesa including a drift region. In the transition region, the termination mesa includes a body region arranged on the drift region and in the outer termination region the drift region of the termination mesa extends to the first surface. The edge termination region further includes a continuous trench positioned in the outer termination region, that laterally surrounds the columnar termination trenches, and is filled with at least one dielectric material.

Provided is a semiconductor apparatus, wherein a doping concentration distribution in the buffer region has a deepest slope where a doping concentration monotonically decreases to a position where it comes in contact with the drift region in a direction from the lower surface of the semiconductor substrate toward an upper surface, a hydrogen chemical concentration distribution in the buffer region includes in a first depth range provided with the slope: a first decrease portion where a hydrogen chemical concentration decreases toward the upper surface side; a second decrease portion located closer to the upper surface side than the first decrease portion is and where the chemical concentration decreases; and an intermediate portion arranged between the first and second decrease portions, and the intermediate portion has: a flat portion where the distribution is uniform; a peak in a slope of the chemical concentration; or a kink portion of the chemical concentration.

Provided is a semiconductor device including: a buffer region having a doping concentration higher than a bulk donor concentration; a first low-concentration hydrogen peak in the buffer region; a second low-concentration hydrogen peak in the buffer region closer to a lower surface than the first low-concentration hydrogen peak; a high-concentration hydrogen peak in the buffer region closer to the lower surface than the second low-concentration hydrogen peak, the high-concentration hydrogen peak having a hydrogen chemical concentration higher than that of the second low-concentration hydrogen peak; and a flat region including a region between the two low-concentration hydrogen peaks and a region including the second low-concentration hydrogen peak, and having a doping concentration higher than a bulk donor concentration, an average value of the doping concentration being equal to or smaller than a local minimum value of a doping concentration between the second low-concentration hydrogen peak and the high-concentration hydrogen peak.

Provided is a semiconductor device including: a semiconductor substrate having a drift region of a first conductivity type; and a buffer region of the first conductivity type provided between the drift region and a lower surface of the semiconductor substrate and having a higher doping concentration than the drift region. The buffer region has two or more helium chemical concentration peaks arranged at different positions in a depth direction of the semiconductor substrate.

A field effect transistor includes a semiconductor substrate and multiple trenches disposed at a top surface of the semiconductor substrate. The trenches extend in a first direction at the top surface of the semiconductor substrate, and are disposed to be spaced apart in a direction perpendicular to the first direction. Connection regions are disposed below body regions. The connection regions extend in a second direction intersecting the first direction in a top view of the semiconductor substrate, and are spaced apart in a direction perpendicular to the second direction. Field relaxation regions are disposed below the connection regions and the trenches. The field relaxation regions extend in a third direction intersecting the first direction and the second direction in the top view of the semiconductor substrate, and are spaced apart in a direction perpendicular to the third direction.

In a trench gate type power MOSFET having a super-junction structure, both improvement of a breakdown voltage of a device and reduction of on-resistance are achieved. The trench gate and a column region are arranged so as to be substantially orthogonal to each other in a plan view, and a base region (channel forming region) and the column region are arranged separately in a cross-sectional view.

In an embodiment, a semiconductor device is provided that includes a main transistor having a load path, a sense transistor configured to sense a main current flowing in the load path of the main transistor, and at least one bypass diode structure configured to protect the sense transistor. The at least one bypass diode structure is electrically coupled in parallel with the sense transistor.

Methods may include providing a device structure having a shielding layer formed beneath each trench in a MOSFET to protect trench corner breakdown. The method may include providing a device structure comprising an epitaxial layer, a well over the epitaxial layer, and a source layer over the well, and providing a plurality of trenches through the device structure. The method may further include forming a shielding layer in the device structure by directing ions into the plurality of trenches.

There is provided a semiconductor device including: a semiconductor layer including a main surface; a plurality of trenches including a plurality of first trench portions and a plurality of second trench portions, respectively; an insulating layer formed in an inner wall of each of the second trench portions; a first electrode buried in each of the second trench portions with the insulating layer interposed between the first electrode and each of the second trench portions; a plurality of insulators buried in the first trench portions so as to cover the first electrode; a contact hole formed at a region between the plurality of first trench portions in the semiconductor layer so as to expose the plurality of insulators; and a second electrode buried in the contact hole.

A method of processing a power semiconductor device includes: providing a semiconductor body with a drift region of a first conductivity type; forming a plurality of trenches extending into the semiconductor body along a vertical direction and arranged adjacent to each other along a first lateral direction; providing a mask arrangement at the semiconductor body, the mask arrangement having a lateral structure according to which some of the trenches are exposed and at least one of the trenches is covered by the mask arrangement along the first lateral direction; forming, below bottoms of the exposed trenches, a plurality of doping regions of a second conductivity type complementary to the first conductivity type; removing the mask arrangement; and extending the plurality of doping regions in parallel to the first lateral direction such that the plurality of doping regions overlap and form a barrier region of the second conductivity type adjacent to the bottoms of the exposed trenches.