A switching circuit forming a bidirectional switch between a first node and a second node and resting on a substrate, the circuit comprising°: a first branch with a first diode in series with a first heterojunction field-effect transistor, a second branch with a second heterojunction field-effect transistor in series with a second diode, the first branch and the second branch being mounted in parallel to one another and so that the first diode and the second diode are arranged in antiparallel or in anti-series with respect to one another, the first transistor, the second transistor being each provided with a control gate facing a heterojunction band forming an active zone in which an electron gas is capable of being formed, the first diode being a Schottky diode with a metal electrode in contact with the heterojunction band, the second diode being a Schottky diode with a metal electrode in contact with the heterojunction band, the first diode, the first transistor, the second diode, the second transistor sharing the same active zone (FIG. 5).

A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.

A heterojunction bipolar transistor includes an emitter layer on a base layer on a collector layer on an upper sub-collector layer over a bottom sub-collector layer, a first dielectric film over the bottom sub-collector layer, the base layer and the emitter layer, a base electrode on the first dielectric film, electrically connected to the base layer through at least one first via hole in the first dielectric film, a second dielectric film on the first dielectric film and the base electrode, and a conductive layer on the second dielectric film, with conductive layer electrically connected to base electrode through a second via hole disposed in the second dielectric film, first dielectric film between the base electrode and first sidewall of a stack including the base layer and the collector layer, and second via hole laterally separated from the base layer.

Disclosed is a semiconductor structure including a device, such as a lateral heterojunction bipolar transistor (HBT), made up of a combination of at least three different semiconductor materials with different bandgap sizes for improved performance. In the device, a base layer of the base region can be positioned laterally between a collector layer of a collector region and an emitter layer of an emitter region and can be physically separated therefrom by buffer layers. The base layer can be made of a narrow bandgap semiconductor material, the collector layer and, optionally, the emitter layer can be made of a wide bandgap semiconductor material, and the buffer layers can be made of a semiconductor material with a bandgap between that of the narrow bandgap semiconductor material and the wide bandgap semiconductor material. Also disclosed herein is a method of forming the structure.

A semiconductor device having a GeSiSn base region combined with an emitter region and a collector region can be used to fabricate a bipolar transistor or a heterojunction bipolar transistor. The GeSiSn base region can be compositionally graded or latticed matched or strained to GaAs. The GeSiSn base region can be wafer bonded to a GaN or SiC collector region.

A semiconductor device includes a semiconductor substrate, a first semiconductor region of a first semiconductor type, formed within the semiconductor substrate, wherein the first semiconductor region includes a first doped region formed in a lower portion of the first semiconductor region and a second doped region formed over the first doped region in an upper portion of the first semiconductor region. A defect layer having an upper surface formed in an upper portion of the first doped region. A second semiconductor region of a second semiconductor type is formed over the first semiconductor region.

Disclosed is a semiconductor structure with a lateral bipolar junction transistor (BJT). This semiconductor structure can be readily integrated into advanced silicon-on-insulator (SOI) technology platforms. Furthermore, to maintain or improve upon performance characteristics (e.g., cut-off frequency (fT)/maximum oscillation frequency (fmax) and beta cut-off frequency) that would otherwise be negatively impacted due to changing of the orientation of the BJT from vertical to lateral, the semiconductor structure can further include a dielectric stress layer (e.g., a tensilely strained layer in the case of an NPN-type transistor or a compressively strained layer in the case of a PNP-type transistor) partially covering the lateral BJT for charge carrier mobility enhancement and the lateral BJT can be configured as a lateral heterojunction bipolar transistor (HBT). Also disclosed is a method for forming the semiconductor structure.

The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor with gated collector and methods of manufacture. The structure includes: an extrinsic base region vertically over a semiconductor substrate and comprising asymmetrical sidewall spacers on opposing sidewalls of the extrinsic base region; a collector region on the semiconductor substrate and separated from the extrinsic base region by at least a first spacer of the asymmetrical sidewall spacers; and an emitter region on the semiconductor substrate and separated from the extrinsic base region by a second spacer of the asymmetrical sidewall spacers.

The present disclosure relates to semiconductor structures and, more particularly, to annular bipolar transistors and methods of manufacture. The structure includes: a substate material; a collector region parallel to and above the substrate material; an intrinsic base region surrounding the collector region; an emitter region above the intrinsic base region; and an extrinsic base region contacting the intrinsic base region

Structures for a bipolar junction transistor and methods of forming a structure for a bipolar junction transistor. The structure includes an emitter having a raised portion, a collector having a raised portion, and a base having a base layer and an extrinsic base layer stacked with the base layer. The base layer and the extrinsic base layer are positioned in a lateral direction between the raised portion of the emitter and the raised portion of the collector, the base layer has a first width in the lateral direction, the extrinsic base layer has a second width in the lateral direction, and the second width is greater than the first width.