The invention provides a structure of an emitter layer and a base layer that reduces the influence of a conduction band energy barrier generated at an interface between the emitter layer and the base layer on power amplifier characteristics for a GaAs HBT using InGaAs grown by pseudomorphic growth in the base layer. In the first invention, InGaP having a CuPt-type ordering is used in the emitter layer. In the second invention, a p-type impurity concentration of an InGaAs base layer grown by pseudomorphic growth is less in an emitter layer side portion than in a collector layer side portion.

Provided is a common-emitter and common-base heterojunction bipolar transistor disposed on a packaging substrate with a heat sink, including a common-base heterojunction bipolar transistor having a first base, a first emitter and a first collector, a common-emitter heterojunction bipolar transistor having a second base, a second emitter and a second collector, a heat shunt bridge for connecting the first emitter with the second collector, a first pad for being connected with the first base and a first copper pillar, a second pad for being connected with the first collector and a second copper pillar, a third pad for being connected with the second base and a third copper pillar, and a fourth copper pillar disposed above the second emitter; the common-emitter and common-base heterojunction bipolar transistor is flip-chip mounted on the packaging substrate, and the fourth copper pillar is soldered on the heat sink.

This disclosure provides a high-voltage terahertz strained SiGe/InGaP heterojunction bipolar transistor and a preparation method thereof. An InGaP material has characteristics of a high carrier mobility of the InP material and a forbidden band width of the GaP material, so that the present disclosure employs the N-type In.sub.1-xGa.sub.xP layer as the collector to improve the frequency and power characteristics of the device, and realize the system integration of terahertz band chips. Further, the present disclosure utilizes the characteristics of the above materials and takes an advantages of “energy band engineering”, uses the In.sub.1-xGa.sub.xP (x=0-1) is used as the material of the collector of the SiGe-HBT, the composition molar ratio X of In and Ga is appropriately selected, such that the materials SiGe of the collector and the sub-collector have the same lattice constant, so as to effectively improve interface characteristics of InGaP and SiGe materials.

The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors and methods of manufacture. The structure includes: a sub-collector region in a substrate; a collector region above the sub-collector region, the collector region composed of semiconductor material; an intrinsic base region composed of intrinsic base material surrounded by the semiconductor material above the collector region; and an emitter region above the intrinsic base region.

An emitter contact layer, an emitter layer, a base layer, a p-type base layer, a collector layer, and a sub-collector layer are crystal-grown over a first substrate in this order with the main surface as the Group III polar surface. The emitter contact layer includes a nitride semiconductor that is made n-type at a relatively high concentration. The emitter layer includes a nitride semiconductor having a bandgap larger than that of the nitride semiconductor constituting the emitter contact layer. The base layer includes an undoped nitride semiconductor having a bandgap smaller than that of the nitride semiconductor constituting the emitter layer. The p-type base layer includes the same nitride semiconductor as the base layer and made p-type.

A memory device, and a method of making the same, includes a resistive random-access memory element electrically connected to an extrinsic base region of a bipolar junction transistor, the extrinsic base region of the bipolar junction transistor consisting of an epitaxially grown material that forms the bottom electrode of the resistive random-access memory element. Additionally, a method of writing to the memory device includes applying a first voltage on a word line of the memory device to form a filament in the resistive random-access memory element. A second voltage including an opposite polarity to the first voltage can be applied to the word line to remove a portion of the filament in the resistive random-access memory element.

A method for fabricating a heterojunction bipolar transistor (HBT) comprises providing a semiconductor support layer and forming an even number of at least four elongated wall structures on the support layer. The wall structures are arranged side-by-side at a regular interval. An odd number of at least three semiconductor collector-material ridge structures are formed on the support layer. Each ridge structure is formed between two adjacent wall structures. A semiconductor base-material layer is formed on a determined ridge structure of the at least three ridge structures. A semiconductor emitter-material layer is formed on the base-material layer. The base-material layer is epitaxially extended so that it coherently covers all the wall structures and all the ridge structures. All the ridge structures except for the determined ridge structure are selectively removed.

A charge control structure is provided for a bipolar junction transistor to control the charge distribution in the depletion region extending into the bulk collector region when the collector-base junction is reverse-biased. The charge control structure comprises a lateral field plate above the upper surface of the collector and dielectrically isolated from the upper surface of the collector and a vertical field plate which is at a side of the collector and is dielectrically isolated from the side of the collector. The charge in the depletion region extending into the collector is coupled to the base as well as the field-plates in the charge-control structure, instead of only being coupled to the base of the bipolar junction transistor. In this way, a bipolar junction transistor is provided where the dependence of collector current on the collector-base voltage, also known as Early effect, can be reduced.

Certain aspects of the present disclosure generally relate to an integrated circuit (IC) having a heterojunction bipolar transistor (HBT) device. The HBT device generally includes an emitter region, a collector region, and a base region disposed between the emitter region and the collector region, the base region and the collector region comprising different semiconductor materials. The HBT device may also include an etch stop layer disposed between the collector region and the base region. The HBT device also includes an emitter contact, wherein the emitter region is between the emitter contact and the base region, and a collector contact, wherein the collector region is between the collector contact and the base region.

The present disclosure provides an HBT that includes (i) a semiconductor support layer; at least four wall structures side-by-side on the support layer; (iii) a semiconductor collector-material ridge structure disposed on the support layer between two adjacent wall structures of the at least four wall structures; (iv) a semiconductor base-material layer, wherein a first part of the base-material layer is disposed on a first region of the ridge structure and a second part of the base-material layer is disposed across the wall structures, wherein the base-material layer is supported by the wall structures; (v) a semiconductor emitter-material layer disposed on the first part of the base-material layer; (vi) a base contact layer disposed on the second part of the base-material layer; an emitter contact layer disposed on the emitter-material layer; and (viii) a collector contact layer disposed on a second region of the ridge structure.