Disclosed is a bipolar semiconductor device, comprising a semiconductor body having a first surface; and a base region of a first doping type and a first emitter region in the semiconductor body, wherein the first emitter region adjoins the first surface and comprises a plurality of first type emitter regions of a second doping type complementary to the first doping type, a plurality of second type emitter regions of the second doping type, a plurality of third type emitter regions of the first doping type, and a recombination region comprising recombination centers, wherein the first type emitter regions and the second type emitter regions extend from the first surface into the semiconductor body, wherein the first type emitter regions have a higher doping concentration and extend deeper into the semiconductor body from the first surface than the second type emitter regions, wherein the third type emitter regions adjoin the first type emitter regions and the second type emitter regions, and wherein the recombination region is located at least in the first type emitter regions and the third type emitter regions.

Plural sessions of proton irradiation are performed by differing ranges from a substrate rear surface side. After first to fourth n-type layers of differing depths are formed, the protons are activated. Next, helium is irradiated to a position deeper than the ranges of the proton irradiation from the substrate rear surface, introducing lattice defects. When the amount of lattice defects is adjusted by heat treatment, protons not activated in a fourth n-type layer are diffused, forming a fifth n-type layer contacting an anode side of the fourth n-type layer and having a carrier concentration distribution that decreases toward the anode side by a more gradual slope than that of the fourth n-type layer. The fifth n-type layer that includes protons and helium and the first to fourth n-type layers that include protons constitute an n-type FS layer. Thus, a semiconductor device having improved reliability and lower cost may be provided.

Provided is a semiconductor device comprising a semiconductor substrate containing oxygen. An oxygen concentration distribution in a depth direction of the semiconductor substrate has a high oxygen concentration part where an oxygen concentration is higher on a further upper surface-side than a center in the depth direction of the semiconductor substrate than in a lower surface of the semiconductor substrate. The high oxygen concentration part may have a concentration peak in the oxygen concentration distribution. A crystal defect density distribution in the depth direction of the semiconductor substrate has an upper surface-side density peak on the upper surface-side of the semiconductor substrate, and the upper surface-side density peak may be arranged within a depth range in which the oxygen concentration is equal to or greater than 50% of a peak value of the concentration peak.

Provided is a semiconductor device comprising: a semiconductor substrate; a gate trench section that is provided from an upper surface to an inside of the semiconductor substrate and extends in a predetermined extending direction on the upper surface of the semiconductor substrate; a mesa section in contact to the gate trench section in an arrangement direction orthogonal the extending direction; and an interlayer dielectric film provided above the semiconductor substrate; wherein the interlayer dielectric film is provided above at least a part of the gate trench section in the arrangement direction; a contact hole through which the mesa section is exposed is provided to the interlayer dielectric film; and a width of the contact hole in the arrangement direction is equal to or greater than a width of the mesa section in the arrangement direction.

A semiconductor device in which a transistor and a diode are formed on a common semiconductor substrate is provided. The semiconductor substrate includes a transistor region in which a transistor is formed and a diode region in which a diode is formed. At least one first electrode on a second main surface side of the transistor region and at least one second electrode on a second main surface side of the diode region are made of different materials.

A semiconductor device includes a main element and a sense element. Each of the main element and the sense element includes a drift layer, a base layer, an emitter region, a gate insulation film, a gate electrode, and a rear surface layer. The base layer is on the drift layer. The emitter region is at a surface layer portion of the base layer. The gate insulation film is disposed at a surface of the base layer between the emitter region and the drift layer. The gate electrode is on the gate insulation film. The rear surface layer faces the base layer with the drift layer between the rear surface layer and the base layer. The rear surface layer in the main element includes a collector layer. The rear surface layer in the sense element includes a low-impurity layer having smaller amount of impurities than the collector layer.

This application provides an insulated gate bipolar transistor, a motor control unit, and a vehicle. The insulated gate bipolar transistor includes three device structure feature layers that are laminated. An IGBT device structure feature layer (10) and an RC-IGBT device structure feature layer (30) are respectively arranged on two sides of an SJ device structure feature layer (20). The RC-IGBT device structure feature layer (30) includes a collector (12) and a drain (13) that are disposed at a same layer. The insulated gate bipolar transistor further includes a first metal electrode (15) laminated with and electrically connected to the collector (12), and a second metal electrode (14) laminated with and electrically connected to the drain (13), and the first metal electrode (15) is electrically isolated from the second metal electrode (14).

An insulated gate bipolar transistor and a preparation method thereof, and an electronic device. The insulated gate bipolar transistor includes: a drift region; an electrode structure on one side of the drift region; and an electric field stop layer arranged on one side of the drift region away from the electrode structure. The electric field stop layer includes a first sublayer and a second sublayer laminated together. The first sublayer is arranged close to the drift region. A junction depth of the first sublayer is greater than a junction depth of the second sublayer. A peak value of a doping concentration of the first sublayer is less than a peak value of a doping concentration of the second sublayer. A slope of a doping concentration curve of the first sublayer is less than a slope of a doping concentration curve of the second sublayer.

A silicon carbide semiconductor device includes a semiconductor substrate, a first semiconductor layer, a second semiconductor layer, a first semiconductor region, and a gate electrode. Protons are implanted in a first region spanning a predetermined distance from a surface of the semiconductor substrate facing toward the first semiconductor layer, in a second region spanning a predetermined distance from a surface of the first semiconductor layer on the second side of the first semiconductor layer facing toward the semiconductor substrate, in a third region spanning a predetermined distance from a surface of the first semiconductor layer on the first side of the first semiconductor layer facing toward the second semiconductor layer, and in a fourth region spanning a predetermined distance from a surface of the second semiconductor layer on the second side of the second semiconductor layer facing toward the first semiconductor layer.

A semiconductor device includes a semiconductor part, first and second electrodes and a control electrode. The semiconductor part is provided between the first and second electrodes. The control electrode is provided between the semiconductor part and the second electrode. The semiconductor part includes first, third and fifth layers of a first conductivity type, and second, fourth, sixth and seventh layers of a second conductivity type. The second layer is provided between the first layer and the second electrode. The third layer is provided between the second layer and the second electrode. The fourth and fifth layers are provided between the first layer and the first electrode. The sixth layer surrounds the second and third layers. The seventh layer is provided between the first layer and the first electrode. The seventh layer surrounds the fourth and fifth layers and is apart from the fourth and fifth layers.