Patent classifications
H01L29/0891
GALLIUM NITRIDE TRANSISTOR WITH A DOPED REGION
In some examples, a transistor comprises a gallium nitride (GaN) layer; a GaN-based alloy layer having a top side and disposed on the GaN layer, wherein source, drain, and gate contact structures are supported by the GaN layer; and a first doped region positioned in a drain access region and extending from the top side into the GaN layer.
Field effect transistor
A field effect transistor comprising: a first semiconductor structure, the first semiconductor structure having a channel layer; a second semiconductor structure, the second semiconductor structure is arranged on the first semiconductor structure, and the second semiconductor structure is stacked in sequence from bottom to top with a Schottky layer, a first etch stop layer, a wide recess layer, an ohmic contact layer, and a narrow recess, a wide recess is opened in the ohmic contact layer, so that the upper surface of the wide recess layer forms a wide recess area and the upper surface of the Schottky layer forms a narrow recess area; at least one delta-doped layer, a gate metal contact, the gate metal contact is formed inside the wide recess a source metal contact; and a drain metal contact, and the drain metal contact is located on the other side of the gate metal contact.
Enhancement-mode Device and Method for Manufacturing the Same
An enhancement-mode device includes: a substrate; a channel layer and a barrier layer successively formed on the substrate; an n-type semiconductor layer formed on the barrier layer, a gate region being defined on a surface of the n-type semiconductor layer; a groove that is formed in the gate region and at least partially runs through the n-type semiconductor layer; and a p-type conductor material that is formed on the surface of the n-type semiconductor layer and at least fills the inside of the groove.
METHOD FOR FORMING TRENCH SEMICONDUCTOR DEVICE HAVING SCHOTTKY BARRIER STRUCTURE
A method for forming a semiconductor device includes providing a region of semiconductor material. The method includes providing a trench structure having a trench extending into the region of semiconductor material from a first major surface, and a conductive material disposed within the trench and separated from the region of semiconductor material by a dielectric region. The method includes providing a Schottky contact region disposed adjacent to the first major surface and adjacent to the trench structure. In one example, providing the Schottky contact region comprises forming a layer of material comprising as-formed nickel-chrome; exposing the layer of material to a temperature in a range from about 400 degrees Celsius through about 550 degrees Celsius; and after the step of exposing, removing any unreacted portions of the layer of material.
Field effect transistor (FET) structure with integrated gate connected diodes
A structure having: a plurality of field effect transistors (FETs) connected between a common input and a common output, each one of the field effect transistors comprises: a source region, a drain region, and a gate electrode for controlling carriers through a channel region of a transistor region of the structure between the source region and the drain region; a plurality of diodes, each one of the diodes being associated with a corresponding one of the plurality of FETs, each one of the diodes having an electrode in Schottky contact with a diode region of the corresponding one of the FETs. The gate electrode and the diode electrode extend along parallel lines. The source region, the drain region, the channel region, and a diode region having therein the diode are disposed along a common line.
Method for forming trench semiconductor device having Schottky barrier structure
A method for forming a semiconductor device includes providing a region of semiconductor material. The method includes providing a trench structure having a trench extending into the region of semiconductor material from a first major surface, and a conductive material disposed within the trench and separated from the region of semiconductor material by a dielectric region. The method includes providing a Schottky contact region disposed adjacent to the first major surface and adjacent to the trench structure. In one example, providing the Schottky contact region comprises forming a first layer of material consisting essentially of titanium and having a first thickness; forming a second layer of material disposed adjacent to the first layer of material consisting essentially of nickel-platinum and having a second thickness; annealing the first layer of material and the second layer of material; and after the step of annealing, removing any unreacted portions of the first layer of material and the second layer of material. In another example, providing the Schottky contact region comprises providing a layer of material consisting essentially of nickel-chrome.
Field effect transistor and process of forming the same
A process of forming a field effect transistor (FET) and a FET are disclosed. The process includes steps of forming a nitride semiconductor layer on a substrate; selectively growing an n.sup.+-region made of oxide semiconductor material on the nitride semiconductor layer and subsequently depositing oxide film on the n.sup.+-region; rinsing the oxide film with an acidic solution; forming an opening in the oxide film to expose the oxide semiconductor layer therein; and depositing a metal within the opening such that the metal is in direct contact with the n.sup.+-region.
Semiconductor device and method of manufacturing semiconductor device
In a first aspect of a present inventive subject matter, a semiconductor device includes a first semiconductor layer that is an electron-supply layer containing as a major component a first semiconductor crystal with a metastable crystal structure; and a second semiconductor layer that is an electron-transit layer containing as a major component a second semiconductor crystal with a hexagonal crystal structure. The first semiconductor crystal contained in the first semiconductor layer is different in composition from the second semiconductor crystal comprised in the second semiconductor layer.
Low voltage (power) junction FET with all-around junction gate
A method for manufacturing a semiconductor device comprises forming a bottom source/drain region on a semiconductor substrate, forming a channel region extending vertically from the bottom source/drain region, growing a top source/drain region from an upper portion of the channel region, and growing a gate region from a lower portion of the channel region under the upper portion, wherein the gate region is on more than one side of the channel region.
METHOD FOR FORMING TRENCH SEMICONDUCTOR DEVICE HAVING SCHOTTKY BARRIER STRUCTURE
A method for forming a semiconductor device includes providing a region of semiconductor material. The method includes providing a trench structure having a trench extending into the region of semiconductor material from a first major surface, and a conductive material disposed within the trench and separated from the region of semiconductor material by a dielectric region. The method includes providing a Schottky contact region disposed adjacent to the first major surface and adjacent to the trench structure. In one example, providing the Schottky contact region comprises forming a first layer of material consisting essentially of titanium and having a first thickness; forming a second layer of material disposed adjacent to the first layer of material consisting essentially of nickel-platinum and having a second thickness; annealing the first layer of material and the second layer of material; and after the step of annealing, removing any unreacted portions of the first layer of material and the second layer of material. In another example, providing the Schottky contact region comprises providing a layer of material consisting essentially of nickel-chrome.