A high electron mobility transistor includes: a first semiconductor layer over a substrate, and a second semiconductor layer over the first semiconductor layer, the second semiconductor layer having a band gap discontinuity with the first semiconductor layer, and at the first semiconductor layer and/or the second conductive layer includes indium. A top layer is over the second semiconductor layer, and a metal layer is over, and extends into, the top layer, the top layer separating the metal layer from the second semiconductor layer. A gate electrode is over the top layer, a third semiconductor layer being between the gate electrode and the top layer, where a sidewall of the third semiconductor layer and a sidewall of the metal layer are separated. A source and drain are on opposite sides of the gate electrode, the top layer extending continuously from below the source, below the gate electrode, and below the drain.

A terahertz device includes an antenna base including reflective films, wherein: the reflective films are curved to be recessed; the reflective film and the reflective film are arranged to be adjacent to each other in a y direction; and when viewed from a z direction, the sizes of the reflective film and the reflective film along an x direction are smaller than the sizes of the reflective film and the reflective film along the y direction.

A compound semiconductor substrate and a method for manufacturing the same are provided to suppress surface roughness of a barrier layer while suppressing gate leak.

A method for manufacturing of a compound semiconductor substrate comprises a step forming an electronic traveling layer consisting of a first nitride semiconductor, a step forming a barrier layer consisting of a second nitride semiconductor with a wider band gap than a band gap of the first nitride semiconductor on the electronic traveling layer, and a step forming a cap layer with an organometallic vapor phase epitaxy on the barrier layer and in contact with the barrier layer. The cap layer has a C concentration of 5*10.sup.17 atoms/cm.sup.3 or more and 1*10.sup.20 atoms/cm.sup.3 or less, and consists of a nitride semiconductor. During the step forming the cap layer, source gas of the nitride semiconductor forming the cap layer and hydrocarbon gas are introduced to a top surface of the barrier layer.

A compound semiconductor substrate and a method for manufacturing the same are provided to suppress surface roughness of a barrier layer while suppressing gate leak.

A method for manufacturing of a compound semiconductor substrate comprises a step forming an electronic traveling layer consisting of a first nitride semiconductor, a step forming a barrier layer consisting of a second nitride semiconductor with a wider band gap than a band gap of the first nitride semiconductor on the electronic traveling layer, and a step forming a cap layer with an organometallic vapor phase epitaxy on the barrier layer and in contact with the barrier layer. The cap layer has a C concentration of 5*10.sup.17 atoms/cm.sup.3 or more and 1*10.sup.20 atoms/cm.sup.3 or less, and consists of a nitride semiconductor. During the step forming the cap layer, source gas of the nitride semiconductor forming the cap layer and hydrocarbon gas are introduced to a top surface of the barrier layer.

Embodiments are directed to high electron mobility transistor (HEMT) devices and methods. One such HEMT device includes a substrate having a first surface, and first and second heterostructures on the substrate and facing each other. Each of the first and second heterostructures includes a first semiconductor layer on the first surface of the substrate, a second semiconductor layer on the first surface of the substrate, and a two-dimensional electrode gas (2DEG) layer between the first and second semiconductor layers. A doped semiconductor layer is disposed between the first and second heterostructures, and a source contact is disposed on the first heterostructure and the second heterostructure.

Embodiments are directed to high electron mobility transistor (HEMT) devices and methods. One such HEMT device includes a substrate having a first surface, and first and second heterostructures on the substrate and facing each other. Each of the first and second heterostructures includes a first semiconductor layer on the first surface of the substrate, a second semiconductor layer on the first surface of the substrate, and a two-dimensional electrode gas (2DEG) layer between the first and second semiconductor layers. A doped semiconductor layer is disposed between the first and second heterostructures, and a source contact is disposed on the first heterostructure and the second heterostructure.

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer; using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer; forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer; using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer; forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.

A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a group of negatively-charged ions, and a field plate. The gate electrode and the drain electrode disposed above the second nitride-based semiconductor layer to define a drift region therebetween. The group of negatively-charged ions are implanted into the drift region and spaced apart from an area directly beneath the gate and drain electrodes to form at least one high resistivity zone in the second nitride-based semiconductor layer. The field plate is disposed over the gate electrode and extends in a region between the gate electrode and the high resistivity zone.

Embodiments herein describe techniques, systems, and method for a semiconductor device. A semiconductor device may include isolation areas above a substrate to form a trench between the isolation areas. A first buffer layer is over the substrate, in contact with the substrate, and within the trench. A second buffer layer is within the trench over the first buffer layer, and in contact with the first buffer layer. A channel area is above the first buffer layer, above a portion of the second buffer layer that are below a source area or a drain area, and without being vertically above a portion of the second buffer layer. In addition, the source area or the drain area is above the second buffer layer, in contact with the second buffer layer, and adjacent to the channel area. Other embodiments may be described and/or claimed.