Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a first silicon fin having a longest dimension along a first direction. A second silicon fin having a longest dimension is along the first direction. An insulator material is between the first silicon fin and the second silicon fin. A gate line is over the first silicon fin and over the second silicon fin along a second direction, the second direction orthogonal to the first direction, the gate line having a first side and a second side, wherein the gate line has a discontinuity over the insulator material, the discontinuity filled by a dielectric plug.

Disclosed is a triple structure cell and an element including the same. The ferroelectric cell of the triple structure includes a polarizable material layer, a top dielectric layer disposed on the polarizable material layer, and a bottom dielectric layer disposed under the polarizable material layer.

The present disclosure relates to an integrated circuit (IC) in which a memory structure comprises a ferroelectric structure without critical-thickness limitations. The memory structure comprises a first electrode and the ferroelectric structure. The ferroelectric structure is vertically stacked with the first electrode and comprises a first ferroelectric layer, a second ferroelectric layer, and a first restoration layer. The second ferroelectric layer overlies the first ferroelectric layer, and the first restoration layer is between and borders the first and second ferroelectric layers. The first restoration layer is a different material type than that of the first and second ferroelectric layers and is configured to decouple crystalline lattices of the first and second ferroelectric layers so the first and second ferroelectric layers do not reach critical thicknesses. A critical thickness corresponds to a thickness at and above which the orthorhombic phase becomes thermodynamically unstable, such that remanent polarization is lost.

Techniques are disclosed herein for ferroelectric-based field-effect transistors (FETs) with threshold voltage (VT) switching for enhanced RF switch transistor on-state and off-state performance. Employing a ferroelectric gate dielectric layer that can switch between two ferroelectric states enables a higher VT during the transistor off-state (VT,hi) and a lower VT during the transistor on-state (VT,lo). Accordingly, the transistor on-state resistance (Ron) can be maintained low due to the available relatively high gate overdrive (Vg,on−VT,lo) while still handling a relatively high maximum RF power in the transistor off-state due to the high VT,hi −Vg,off value. Thus, the Ron of an RF switch transistor can be improved without sacrificing maximum RF power, and/or vice versa, the maximum RF power can be improved without sacrificing the Ron. A ferroelectric layer (e.g., including Hf.sub.xZr.sub.yO) can be formed between a transistor gate dielectric layer and gate electrode to achieve such benefits.

Present invention relates to a highly-integrated memory cell and a semiconductor device including the same. According to an embodiment of the present invention, a semiconductor device comprises: an active layer including a channel, the active layer being spaced apart from a substrate and extending in a direction parallel to a surface of the substrate; a gate dielectric layer formed over the active layer; a word line laterally oriented in a direction crossing the active layer over the gate dielectric layer and including a low work function electrode and a high work function electrode, the high work function electrode having a higher work function than the low work function electrode; and a dipole inducing layer disposed between the high work function electrode and the gate dielectric layer.

To allow a metal oxide film composed mainly of O and at least one of Hf and Zr to exhibit ferroelectric properties. After deposition of a hafnium oxide film on a semiconductor substrate via an insulating film, the semiconductor substrate is exposed to microwaves to selectively heat the hafnium oxide film. This makes it possible to form a larger number of orthorhombic crystals in the crystals of the hafnium oxide film. The hafnium oxide film thus obtained can therefore exhibit ferroelectric properties without adding, thereto, an impurity such as Si. This means that the hafnium oxide film having a reverse size effect can be used as a ferroelectric film of a ferroelectric memory cell and contributes to the manufacture of a miniaturized ferroelectric memory cell.

A method of fabricating a heterostructure includes providing a substrate, and implementing a non-sputtered, epitaxial growth procedure at a growth temperature to form a wurtzite structure supported by the substrate. The wurtzite structure includes an alloy of gallium nitride. The non-sputtered, epitaxial growth procedure is configured to incorporate a group IIIB element into the alloy. The wurtzite structure exhibits a breakdown field strength greater than a ferroelectric coercive field strength of the wurtzite structure.

Provided are a non-volatile memory device and a method of operating the same. The non-volatile memory device includes a substrate, a plurality of word lines extending in a first direction on the substrate, a plurality of ferroelectric patterns respectively provided on the word lines, a blocking insulating film covering the ferroelectric patterns, a plurality of bit line pairs including a first bit line and a second bit line extending in a second direction crossing the word lines and the ferroelectric patterns on the blocking insulating film and intersecting the first direction, and a channel pattern provided between the first bit line and the second bit line of each of the bit line pairs on the blocking insulating film, wherein the channel pattern has an ambipolar conduction characteristic.

Describe is a resonator that uses ferroelectric (FE) materials in the gate of a transistor as a dielectric. The use of FE increases the strain/stress generated in the gate of the FinFET. Along with the usual capacitive drive, which is boosted with the increased polarization, FE material expands or contacts depending on the applied electric field on the gate of the transistor. As such, acoustic waves are generated by switching polarization of the FE materials. In some embodiments, the acoustic mode of the resonator is isolated using phononic gratings all around the resonator using the metal line above and vias' to body and dummy fins on the side. As such, a Bragg reflector is formed above the FE based transistor.

A ferroelectric structure includes a first polarization enhancement film on a ferroelectric film, wherein the ferroelectric film has a first net polarization in a first direction oriented from the ferroelectric film toward the first polarization enhancement film. The first polarization enhancement film has a second net polarization in a second direction crossing the first direction.