H01L2223/6655

ELECTRONIC PACKAGE WITH INTERPOSER BETWEEN INTEGRATED CIRCUIT DIES

The disclosure is directed to an electronic package with an interposer between integrated circuit dies. At least one inner capacitor (e.g., single layer capacitor) is mounted to the interposer. The electronic package further includes an input passive circuit substrate and an output passive circuit substrate mechanically coupled to the metal base. Use of an interposer to be simultaneously solder attached with integrated circuit dies provides a configuration that improves linearity performance and/or wide video bandwidth of the electronic package (e.g., packages that use epoxy and laminate interposers). Further, such configuration facilitates efficient manufacturing of the electronic package at high volumes.

Amplifier
11264951 · 2022-03-01 · ·

An amplifier includes: a circuit pattern providing a plurality of signal paths having different lengths; a transistor chip; a plurality of pads of transistor cells, the pads being electrically connected to the circuit pattern and being arranged on the transistor chip; a plurality of the transistor cells; a plurality of transmission lines for connecting each of the plurality of pads and each of the plurality of transistor cells, the transmission lines being arranged on the transistor chip, and a plurality of harmonic processing circuits each connected to each of the plurality of transmission lines and arranged on the transistor chip. The plurality of harmonic processing circuits each has a capacitor and an inductor, and a product of the capacitance of the capacitor and the inductance of the inductor is made constant in each of the plurality of harmonic processing circuits.

Method of manufacturing power amplifier package embedded with input-output circuit
11264251 · 2022-03-01 · ·

A method of manufacturing a power amplifier package embedded with an input-output circuit including a dielectric circuit board, a heat sink and lead frames, the method comprising: the step of preparing the dielectric circuit board including the steps of forming a power amplifier hole in which a power amplifier chip is to be disposed on a dielectric substrate, printing an input matching network metal pattern on a left side of the power amplifier hole, and printing an output matching network metal pattern on a right side of the power amplifier hole, and sintering the input matching network metal pattern and the output matching network metal pattern printed on the dielectric substrate; the step of preparing the lead frames by etching alloy 42 and plating nickel; and the step of attaching the heat sink on a bottom surface of the dielectric circuit board.

Multi-Cavity Package Having Single Metal Flange

A multi-cavity package includes a single metal flange having first and second opposing main surfaces. The multi-cavity package also includes a dielectric material attached to the first main surface of the single metal flange. The dielectric material includes a first surface facing the single metal flange, and a second surface facing away from the first surface. The dielectric material also includes a plurality of openings exposing different regions of the first main surface of the single metal flange. The dielectric material also includes a lateral extension that overhangs the single metal flange. A corresponding method of manufacturing is also provided.

INTEGRATED CIRCUIT

According to the present invention, an integrated circuit includes a first amplifier stage, a second amplifier stage, a first signal line connecting an output of the first amplifier stage and an input of the second amplifier stage to each other, a first plane for ground connected to the first amplifier stage, a second plane for ground connected to the second amplifier stage and at least one at least one line for ground connecting the first plane and the second plane to each other, wherein the at least one line has a center line having a length of 10 μm to 1 mm, a width of the at least one line is ⅓ or less of a width of the first plane, and a pattern ratio is 1 or more.

Matching techniques for wide-bandgap power transistors

There are disclosed impedance matching networks and technique for impedance matching to microwave power transistors. Distributed capacitor inductor networks are used so as to provide a high degree of control and accuracy, especially in terms of inductance values, in comparison to existing lumped capacitor arrangements. The use of bond wires is reduced, with inductance being provided primarily by microstrip transmission lines on the capacitors.

Radio frequency devices with surface-mountable capacitors for decoupling and methods thereof

An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.

Amplifier devices with impedance matching networks that incorporate a capacitor integrated with a bond pad

The embodiments described herein provide an amplifier device that utilizes bonding pad capacitance in an impedance matching network. In one specific embodiment, the amplifier device comprises: an amplifier formed on a semiconductor die, the amplifier including an amplifier input and an amplifier output, the amplifier configured to generate an amplified radio frequency (RF) signal at the amplifier output; and an impedance matching network coupled to the amplifier, the impedance matching network including a capacitor, where the capacitor includes a first plate, a second plate, and dielectric material between the first and second plates, where the first plate includes or is directly electrically coupled to a bond pad on the semiconductor die.

HIGH-FREQUENCY MODULE
20170301561 · 2017-10-19 ·

On a substrate (200), a resistor (24R) is disposed between a position of an amplifier circuit (11) and a position of a duplexer (24), thereby reducing coupling occurring in a space between the amplifier circuit (11) and a path extending from a main switch (26) to a reception terminal (P24) through the duplexer (24). Even when an RX terminal (242) of the duplexer (24) is oriented toward an amplifier circuit (11) side, a high-frequency module (100) reduces the coupling and can thus prevent a harmonic of a transmission signal in a low band from leaking to the reception terminal (P24) through a path formed by the coupling. That is, the high-frequency module (100) can prevent a reduction in isolation characteristics in the low band and a high band and also provide flexibility in substrate layout.

SELECTIVELY SHIELDING RADIO FREQUENCY MODULE WITH MULTI-LAYER ANTENNA

Aspects of this disclosure relate to selectively shielded radio frequency modules. A radio frequency module can include a package substrate, a radio frequency component on the package substrate, a multi-layer antenna, a radio frequency shielding structure configured to provide shielding between the multi-layer antenna and the radio frequency component. The radio frequency shielding structure can include a shielding layer providing a shield over the radio frequency component and leaving the radio frequency module unshielded over the antenna.