Patent classifications
H01L2224/02321
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
A semiconductor device includes an insulating layer, conductors, a semiconductor element and a sealing resin. The insulating layer has first and second surfaces opposite to each other in the thickness direction. Each conductor has an embedded part whose portion is embedded in the insulating layer and a redistribution part disposed at the second surface and connected to the embedded part. The semiconductor element has electrodes provided near the first surface and connected the embedded parts of the conductors. The semiconductor element is in contact with the first surface. The sealing resin partially covers the semiconductor element and is in contact with the first surface. The redistribution parts include portions outside the semiconductor element as viewed in the thickness direction. The insulating layer has grooves recessed from the second surface in the thickness direction. The redistribution parts are in contact with the grooves.
Method of pattern placement correction
In one embodiment of the invention, a method for correcting a pattern placement on a substrate is disclosed. The method begins by detecting three reference points for a substrate. A plurality of sets of three die location points are detected, each set indicative of an orientation of a die structure, the plurality of sets include a first set associated with a first dies and a second set associated with a second die. A local transformation is calculated for the orientation of the first die and the second on the substrate. Three orientation points are selected from the plurality of sets of three die location points wherein the orientation points are not set members of the same die. A first global orientation of the substrate is calculated from the selected three points from the set of points and the first global transformation and the local transformation for the substrate are stored.
Display substrate and method for detecting broken fanout wire of display substrate
The present application provides a method for detecting a broken fanout wire of a display substrate, and a display substrate, and belongs to the field of display technology. In the method for detecting a broken fanout wire, the display substrate includes a base substrate having first and second surfaces opposite to each other, and a plurality of connection structures disposed at intervals on the first surface; and each connection structure includes first and second pads and a fanout wire electrically connecting the first pad to the second pad. The method for detecting a broken fanout wire includes: forming at least one detection unit, which includes: connecting at least two connection structures in series through a connecting part; and measuring a head and an end of the detection unit to obtain resistance of the detection unit, and determining whether there is a broken fanout wire in the detection unit.
Electronic system having increased coupling by using horizontal and vertical communication channels
An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.
Redistribution Layer Metallic Structure and Method
The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.
SEMICONDUCTOR PACKAGE HAVING SINGULAR WIRE BOND ON BONDING PADS
Semiconductor packages including active die stacks, and methods of fabricating such semiconductor packages, are described. In an example, a semiconductor package includes an active die having a top surface covered by a molding compound, and a bonding pad attached to only one interconnect wire. A method of fabricating the semiconductor package includes bridging a pair of dies stacks by the interconnect wire, and dividing the interconnect wire to form separate wire segments attached to respective die stacks.
ELECTRONIC SYSTEM HAVING INCREASED COUPLING BY USING HORIZONTAL AND VERTICAL COMMUNICATION CHANNELS
An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.
Electronic system having increased coupling by using horizontal and vertical communication channels
An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.
METHODS OF FORMING REDISTRIBUTION LINES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME
A method of manufacturing a semiconducor device includes providing a semiconductor substrate having a top surface, on which has been formed a color filter and a micro-lens, and a bottom surface opposite to the top surface, forming a redistribution line on the bottom surface of the semiconductor substrate, and forming on the bottom surface of the semiconductor substrate a passivation layer covering the redistribution line. After the redistribution line and passivation layer are formed, an oxide layer between the redistribution line and the passivation is formed at a temperature that avoids thermal damage to the color filter and the micro-lens.
Redistribution layer metallic structure and method
The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.