H01L2224/03505

Electronic devices with semiconductor die attached with sintered metallic layers, and methods of formation of such devices

An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a conductive layer underlying the sintered metallic layer, and a conductive substrate underlying the conductive layer.

Electronic devices with semiconductor die attached with sintered metallic layers, and methods of formation of such devices

An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a conductive layer underlying the sintered metallic layer, and a conductive substrate underlying the conductive layer.

Electronic apparatus and method for manufacturing electronic apparatus
09754904 · 2017-09-05 · ·

An electronic apparatus includes: a first substrate; an electrode over the first substrate; a first conductor having a porous structure above the first substrate, the first conductor covering an upper surface and a side surface of the electrode; and an insulator above the first substrate, the insulator covering an upper surface and a side surface of the first conductor, wherein the insulator has an opening that exposes the first conductor.

METHOD FOR PROCESSING A SUBSTRATE AND AN ELECTRONIC DEVICE

According to various embodiments, a method for processing a substrate may include: processing a plurality of device regions in a substrate separated from each other by dicing regions, each device region including at least one electronic component; wherein processing each device region of the plurality of device regions includes: forming a recess into the substrate in the device region, wherein the recess is defined by recess sidewalls of the substrate, wherein the recess sidewalls are arranged in the device region; forming a contact pad in the recess to electrically connect the at least one electronic component, wherein the contact pad has a greater porosity than the recess sidewalls; and singulating the plurality of device regions from each other by dicing the substrate in the dicing region.

METHOD OF MANUFACTURING A LAYER STRUCTURE HAVING PARTIALLY SEALED PORES

A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.

Method for processing a semiconductor substrate and a method for processing a semiconductor wafer

According to various embodiments, a method for processing a semiconductor substrate may include: covering a plurality of die regions of the semiconductor substrate with a metal; forming a plurality of dies from the semiconductor substrate, wherein each die of the plurality of dies is covered with the metal; and, subsequently, annealing the metal covering at least one die of the plurality of dies.

Method for processing a semiconductor substrate and a method for processing a semiconductor wafer

According to various embodiments, a method for processing a semiconductor substrate may include: covering a plurality of die regions of the semiconductor substrate with a metal; forming a plurality of dies from the semiconductor substrate, wherein each die of the plurality of dies is covered with the metal; and, subsequently, annealing the metal covering at least one die of the plurality of dies.

Methods for registration of circuit dies and electrical interconnects

A method includes placing an electronic device on a pliable mating surface on a major surface of a mold such that at least one contact pad on the electronic device presses against the pliable mating surface. The pliable mating surface is on a microstructure in an arrangement of microstructures on the major surface of the mold. A liquid encapsulant material is applied over the electronic device and the major surface of the mold, and then hardened to form a carrier for the electronic device. The mold and the carrier are separated such that the microstructures on the mold form a corresponding arrangement of microchannels in the carrier, and at least one contact pad on the electronic device is exposed in a microchannel in the arrangement of microchannels. A conductive particle-containing liquid is deposited in the microchannel, which directly contacts the contact pad exposed in the microchannel.

Methods for registration of circuit dies and electrical interconnects

A method includes placing an electronic device on a pliable mating surface on a major surface of a mold such that at least one contact pad on the electronic device presses against the pliable mating surface. The pliable mating surface is on a microstructure in an arrangement of microstructures on the major surface of the mold. A liquid encapsulant material is applied over the electronic device and the major surface of the mold, and then hardened to form a carrier for the electronic device. The mold and the carrier are separated such that the microstructures on the mold form a corresponding arrangement of microchannels in the carrier, and at least one contact pad on the electronic device is exposed in a microchannel in the arrangement of microchannels. A conductive particle-containing liquid is deposited in the microchannel, which directly contacts the contact pad exposed in the microchannel.

Method of manufacturing an electronic device having a contact pad with partially sealed pores

A method of manufacturing an electronic device may include: forming at least one electronic component in a substrate; forming a contact pad in electrical contact with the at least one electronic component; wherein forming the contact pad includes: forming a first layer over the substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface, wherein the second layer has a lower porosity than the first layer.