A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

A semiconductor device is made with a conductive via formed through a top-side of the substrate. The conductive via extends vertically through less than a thickness of the substrate. An integrated passive device (IPD) is formed over the substrate. A plurality of first conductive pillars is formed over the first IPD. A first semiconductor die is mounted over the substrate. An encapsulant is formed around the first conductive pillars and first semiconductor die. A second IPD is formed over the encapsulant. An interconnect structure is formed over the second IPD. The interconnect structure operates as a heat sink. A portion of a back-side of the substrate is removed to expose the first conductive via. A second semiconductor die is mounted to the back-side of the substrate. The second semiconductor die is electrically connected to the first IPD and first semiconductor die through the conductive via.

An apparatus having a power converter circuit having a first active layer having a first set of active devices disposed on a face thereof, a first passive layer having first set of passive devices disposed on a face thereof, and interconnection to enable the active devices disposed on the face of the first active layer to be interconnected with the non-active devices disposed on the face of the first passive layer, wherein the face on which the first set of active devices on the first active layer is disposed faces the face on which the first set of passive devices on the first passive layer is disposed.

Embodiments of mechanisms for forming a package structure are provided. The package structure includes a semiconductor die and a substrate. The package structure includes a pillar bump and an elongated solder bump bonded to the semiconductor die and the substrate. A height of the elongated solder bump is substantially equal to a height of the pillar bump. The elongated solder bump has a first width, at a first horizontal plane passing through an upper end of a sidewall surface of the elongated solder bump, and a second width, at a second horizontal plane passing through a midpoint of the sidewall surface. A ratio of the second width to the first width is in a range from about 0.5 to about 1.1.

Embodiments of mechanisms for forming a package structure are provided. The package structure includes a semiconductor die and a substrate. The package structure includes a pillar bump and an elongated solder bump bonded to the semiconductor die and the substrate. A height of the elongated solder bump is substantially equal to a height of the pillar bump. The elongated solder bump has a first width, at a first horizontal plane passing through an upper end of a sidewall surface of the elongated solder bump, and a second width, at a second horizontal plane passing through a midpoint of the sidewall surface. A ratio of the second width to the first width is in a range from about 0.5 to about 1.1.

A semiconductor device including: a semiconductor substrate a semiconductor element is formed; a first electrode layer stacked on the semiconductor substrate and connected to the semiconductor element; a first insulation film stacked on an upper face of the first electrode layer; and a second electrode layer stacked over the first electrode layer and the first insulation film, the second electrode layer including a material having a mechanical strength that is higher than a mechanical strength of a material included in the first electrode layer; wherein a groove portion is provided from the upper face in a direction toward a lower face of the first electrode layer, a protrusion portion protruding into the groove portion is provided on a lower face of the second electrode layer, and a lower end of the protrusion portion is positioned below the center position in a thickness direction of the first electrode layer.

A semiconductor device including: a semiconductor substrate a semiconductor element is formed; a first electrode layer stacked on the semiconductor substrate and connected to the semiconductor element; a first insulation film stacked on an upper face of the first electrode layer; and a second electrode layer stacked over the first electrode layer and the first insulation film, the second electrode layer including a material having a mechanical strength that is higher than a mechanical strength of a material included in the first electrode layer; wherein a groove portion is provided from the upper face in a direction toward a lower face of the first electrode layer, a protrusion portion protruding into the groove portion is provided on a lower face of the second electrode layer, and a lower end of the protrusion portion is positioned below the center position in a thickness direction of the first electrode layer.

An apparatus having a power converter circuit having a first active layer having a first set of active devices disposed on a face thereof, a first passive layer having first set of passive devices disposed on a face thereof, and interconnection to enable the active devices disposed on the face of the first active layer to be interconnected with the non-active devices disposed on the face of the first passive layer, wherein the face on which the first set of active devices on the first active layer is disposed faces the face on which the first set of passive devices on the first passive layer is disposed.

Various embodiments include apparatus and methods to store data in a first semiconductor memory unit and to store error correction information in a second semiconductor memory unit to recover the data. The error correction information has a value equal to at least the value of the data store in the first memory unit.

A bonding electrode structure of a flip-chip LED chip includes: a substrate; a light-emitting epitaxial layer over the substrate; a bonding electrode over the light-emitting epitaxial layer, wherein the bonding electrode structure includes a metal laminated layer having a bottom layer and an upper surface layer from bottom up. The bottom layer structure is oxidable metal and the side wall forms an oxide layer. The upper surface layer is non-oxidable metal. The bonding electrode structure has a main contact portion, and a grid-shape portion surrounding the main contact portion in a horizontal direction. The problems during packaging and soldering of the flip-chip LED chip structure, such as short circuit or electric leakage, can thus be solved.