Representative implementations of techniques and devices are used to reduce or prevent conductive material diffusion into insulating or dielectric material of bonded substrates. Misaligned conductive structures can come into direct contact with a dielectric portion of the substrates due to overlap, especially while employing direct bonding techniques. A barrier interface that can inhibit the diffusion is disposed generally between the conductive material and the dielectric at the overlap.

A semiconductor device has a semiconductor chip adhesively bonded to a die pad. An area having large irregularities is formed on an upper side surface of the semiconductor chip to be covered by an encapsulating resin, and an area having small irregularities is formed on a lower side surface of the semiconductor chip, thereby improving adhesive strength between the semiconductor chip and the encapsulating resin and preventing penetration of moisture from outside.

An electrical connection includes a first driving substrate, a first adhesive layer, a first bonding pad a first bonding pad and a second bonding pad. The first driving substrate includes a first substrate and a first dielectric layer on the first substrate. The first adhesive layer is at a sidewall of the first dielectric layer of the first driving substrate. The first bonding pad is on the first substrate of the first driving substrate and in contact with the first adhesive layer, and the first bonding pad includes a plurality of grains, the grains are connected with each other, the grains include [111]-oriented copper grains, and a maximum width of the first bonding pad is equal to or less than 8 microns. The second bonding pad is on the first bonding pad.

A method of manufacturing a semiconductor structure is provided. The method includes providing a substrate, disposing a die over the substrate, forming a molding over the substrate and around the die, disposing a first dielectric layer over the die and the molding, curing the first dielectric layer under a first curing condition, disposing a second dielectric layer over the first dielectric layer, and curing the first dielectric layer and the second dielectric layer under the first curing condition.

A method for bonding of a first solid substrate to a second solid substrate which contains a first material with the following steps, especially the following sequence: formation or application of a function layer which contains a second material to the second solid substrate, making contact of the first solid substrate with the second solid substrate on the function layer, pressing together the solid substrates for forming a permanent bond between the first and second solid substrate, at least partially reinforced by solid diffusion and/or phase transformation of the first material with the second material, an increase of volume on the function layer being caused.

A package structure includes a first redistribution circuit structure, a first semiconductor die, and a second semiconductor die. The first redistribution circuit structure has a first side and a second side opposite to the first side. The first semiconductor die is disposed over the firs side of the first redistribution circuit structure. The second semiconductor die is disposed over the second side of the first redistribution circuit structure and is electrically connected thereto, where the second semiconductor die includes a substrate, an interconnect structure disposed on the substrate, a plurality of conductive terminals disposed on and electrically connected to the interconnect structure, and a dielectric layer disposed on the interconnect structure and laterally covering the plurality of conductive terminals. A material of the dielectric layer included in the second semiconductor die is different from a material of a dielectric layer included in the first redistribution circuit structure.

Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes at least part of an inductor.

A semiconductor structure includes a substrate; a die disposed over the substrate, and including a die pad, a conductive via disposed over the die pad and a dielectric material surrounding the conductive via; a molding disposed over the substrate and surrounding the die; a lower dielectric layer disposed nearer the substrate and over the dielectric material and the molding; and an upper dielectric layer disposed further the substrate and over the lower dielectric layer, wherein a material content ratio in the upper dielectric layer is substantially greater than that in the lower dielectric layer, and the material content ratio substantially inversely affects a mechanical strength of the upper dielectric layer and the lower dielectric layer.

A semiconductor structure includes a substrate, a through via penetrating the substrate, a trench capacitor, a first redistribution layer (RDL), a second RDL, and a contact feature. The trench capacitor extends from a back surface toward a front surface of the substrate, wherein the trench capacitor is separated from an active area at the front surface of the substrate. The first RDL is disposed over the front surface and electrically connecting to the through via, wherein the active area is disposed between the trench capacitor and the first RDL. The second RDL is disposed over the back surface and electrically connecting to the through via and the trench capacitor. The contact feature is disposed over the first RDL and electrically connecting to the trench capacitor through the first RDL, the through via and the second RDL. A method of manufacturing the semiconductor structure is also provided.

Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes at least part of an inductor.