H01L2224/10175

MOUNTING STRUCTURE AND MODULE
20200091057 · 2020-03-19 · ·

A mounting structure includes a semiconductor device including a first terminal, a wiring substrate including a second terminal having a first end, a wiring extracted from an end face of the first end, and a photosensitive insulating film that covers the wiring and the first end, the second terminal being disposed facing the first terminal, and a bump that electrically connects the first terminal and the second terminal.

PACKAGED SEMICONDUCTOR DEVICE WITH A PARTICLE ROUGHENED SURFACE
20200083149 · 2020-03-12 ·

A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame. A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame and with a reflow wall that surrounds a portion of the solder joint that couples the semiconductor device to the lead frame. A packaged semiconductor device with a reflow wall that surrounds a portion of a solder joint that couples a semiconductor device to a lead frame.

ELECTRONIC DEVICE MOUNTING BOARD, ELECTRONIC PACKAGE, AND ELECTRONIC MODULE
20200075495 · 2020-03-05 · ·

In one aspect of this disclosure, an electronic device mounting board includes a substrate having a first surface and a second surface opposite to the first surface. The substrate has a first recess located on the first surface and a second recess located on the second surface. The substrate includes an electrode pad. The electrode pad is located in the first recess. The second recess in the substrate contains a reinforcement dividing the second recess into a plurality of recesses. The reinforcement is located separate from the electrode pad or is located to overlap the electrode pad in a plan view.

Package substrate and semiconductor package including the same
10573588 · 2020-02-25 · ·

A package substrate and a semiconductor package are provided. The package substrate including a substrate body having a first surface on which a semiconductor chip is mounted and a second surface opposite to the first surface, and a conductive pad at the first surface, the conductive pad elongated in a first direction, the conductive pad including a plurality of sub-bar patterns spaced apart from each other in the first direction may be provided.

Substrate structure with filling material formed in concave portion

Provided is a substrate structure including a substrate body, electrical contact pads and an insulating protection layer disposed on the substrate body, wherein the insulating protection layer has openings exposing the electrical contact pads, and at least one of the electrical contact pads has at least a concave portion filled with a filling material to prevent solder material from permeating along surfaces of the insulating protection layer and the electric contact pads, thereby eliminating the phenomenon of solder extrusion. Thus, bridging in the substrate structure can be eliminated even when the bump pitch between two adjacent electrical contact pads is small. As a result, short circuits can be prevented, and production yield can be increased.

SEMICONDUCTOR ASSEMBLY INCLUDING MULTIPLE SOLDER MASKS
20240038703 · 2024-02-01 ·

A semiconductor device includes a substrate and a conductive pad coupled to the substrate. A first solder mask is coupled to the substrate and to a portion of the conductive pad so the first solder mask covers the portion of the conductive pad and extends above the conductive pad. A second solder mask is coupled to a portion of the first solder mask and extends above the first solder mask.

PACKAGING STRUCTURE
20190385921 · 2019-12-19 ·

A packaging structure includes a semiconductor chip and conductive connection pillars. Each of the conductive connection pillars has a first surface and a second surface opposite to the first surface, and the first surfaces of the conductive connection pillars are fixed to a surface of the semiconductor chip. The packaging structure also includes a carrier plate. The carrier plate is disposed opposite to the semiconductor chip. The conductive connection pillars are located between the semiconductor chip and the carrier plate, and the second surfaces face the carrier plate. The packaging structure further includes solder layers located between the carrier plate and the second surfaces, and a barrier layer located on the surface of the carrier plate around the solder layers.

FLIP-CHIP METHOD
20190385974 · 2019-12-19 ·

A flip-chip method includes providing a semiconductor chip and conductive connection pillars. Each of the conductive connection pillars has a first surface and a second surface opposite to the first surface. The flip-chip method also includes fixing the conductive connection pillars on a surface of the semiconductor chip. The first surfaces face the semiconductor chip. The flip-chip method also includes providing a carrier plate, forming solder pillars on the carrier plate, and forming a barrier layer on the carrier plate around the solder pillars. The flip-chip method further includes bringing the solder pillars into contact with the second surfaces of the conductive connection pillars. The conductive connection pillars are located above the solder pillars. The flip-chip method further includes performing a reflow-soldering process on the solder pillars, thereby forming solder layers from the solder pillars.

PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME
20240055385 · 2024-02-15 ·

A package structure and a method for fabricating the same are provided. The package structure includes a substrate, a semiconductor package and an adhesive body. The substrate has a first board surface and a second board surface. The semiconductor package has an upper surface and a lower surface, is disposed on the first board surface and electrically connected to the substrate through pins, and has a first vertical projection on the first board surface. An adhesive groove is disposed on the first board surface and is located in at least one portion of the first vertical projection and a periphery of the first vertical projection. The adhesive body is disposed in the adhesive groove, and protrudes to contact the lower surface, so as to fix the semiconductor package. The adhesive groove does not overlap with the pins, and the adhesive body does not contact the pins.

CIRCUIT SUBSTRATE
20190378808 · 2019-12-12 ·

A circuit substrate that includes a substrate having a major surface, a multilayer body on the major surface, and an insulating layer that covers the major surface. The multilayer body includes a first layer and a second layer that overlies the first layer. The first layer is made of a first metal as a main material thereof, and the second layer is made of a second metal as a main material thereof. The second metal has a higher solder wettability than the first metal. As viewed perpendicular to the major surface, the insulating layer is spaced from and surrounds the surface of the second layer so as to define a recess between the multilayer body and the insulating layer.