A method and apparatus for transferring components. A first substrate is provided with the components. A second substrate is provided with an adhesive layer comprising a hot melt adhesive material. The components on the first substrate are contacted with the adhesive layer on the second substrate while the adhesive layer is melted. The adhesive layer is allowed to solidify to form an adhesive connection between the components and the second substrate. The first and second substrates are moved apart to transfer the components. At least a subset of the components is transferred from the second substrate to a third substrate by radiating light onto the adhesive layer to form a jet of melted material carrying the components.

A method for circuit fabrication includes defining a solder bump, including a specified solder material and having a specified bump volume, to be formed at a target location on an acceptor substrate. A transparent donor substrate, having a donor film including the specified solder material, is positioned such that the donor film is in proximity to the target location on the acceptor substrate. A sequence of pulses of laser radiation is directed to pass through the first surface of the donor substrate and impinge on the donor film so as to induce ejection from the donor film onto the target location on the acceptor substrate of a number of molten droplets of the solder material such that the droplets deposited at the target location cumulatively reach the specified bump volume. The target location is heated so the deposited droplets melt and reflow to form the solder bump.

A semiconductor packaging method, a semiconductor assembly and an electronic device are disclosed herein. The semiconductor packaging method comprises providing at least one semiconductor device, a carrier board, and a clamping board. The at least one semiconductor device has a passive surface with first alignment solder parts formed thereon, and the carrier board has a plurality of corresponding second alignment solder parts formed thereon. The method further comprises forming alignment solder joints by aligning and soldering the first alignment solder parts to respective ones of the second alignment solder parts; and injecting a molding compound through one or more openings in one or both of the carrier board and the clamping board to form a molded package body encapsulating the at least one semiconductor device between the carrier board and the clamping board attached to the active surface of the at least one semiconductor device.

Achieving homogeneous and heterogeneous integration for 2.5D and 3D integrated circuit, chip-to-wafer, chip-to-substrate, or wafer-to-wafer bonding is an essential technology. The landing wafer or substrate is bonded with a carrier by using a temporary bonding material before thinning the landing wafer to the desired thickness. Upon completion of redistribution layer formation, Cu pad formation, or other backside processing, dies or wafers with through-silicon vias are stacked onto the landing substrate before molding and singulation. As the landing wafer usually has interconnection metals in the bond line, and those interconnection metals are typically made from lead-free solder alloys, deformation of those solder alloys during thermocompression bonding becomes an issue for manufacturers. To address this issue, a polymeric material with desired strengths is coated on the device wafer to form a conformal protective layer on top of solder alloys, thus enabling temporary bonding and debonding processes.

Protruding solder structures are created for electrical attachment of semiconductor devices. A rigid mold having one or more mold openings is attached to and used in combination with a decal structure that has one or more decal holes. The decal structure is disposed on the rigid mold so that the decal openings are aligned over the mold openings. Each of the decal hole and mold opening in contact form a single combined volume. The single combined volumes are filled with solder to form protruding solder structures. Various structures and methods of making and using the structures are disclosed.

A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate and a metal holder. The substrate includes at least one bonding pad disposed adjacent to its surface and the metal holder is disposed adjacent to the bonding pad.

A printed structure includes a destination substrate comprising two or more contact pads disposed on or in a surface of the destination substrate, a component disposed on the surface, and two or more electrically conductive connection posts. Each of the connection posts extends from a common side of the component. Each of the connection posts is in electrical and physical contact with one of the contact pads. The component is tilted with respect to the surface of the destination substrate. Each of the connection posts has a flat distal surface.

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, arranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

A sintering powder comprising: a first type of metal particles having a mean longest dimension of from 100 nm to 50 μm.

A semiconductor package includes a build-up structure; a semiconductor disposed on the build-up structure in a flip-chip manner and having a plurality of bumps penetrating therethrough; an electronic element disposed on the semiconductor chip; and an encapsulant formed on the build-up structure and encapsulating the semiconductor chip and the electronic element, thereby improving the product yield and the overall heat dissipating efficiency.