A semiconductor device includes a semiconductor substrate, a conductor provided on a main surface of the semiconductor substrate, an insulating layer disposed to cover a surface of the conductor and having a recess from a surface thereof towards the conductor, the recess having an opening provided at a bottom portion of the recess and exposing a portion of the conductor, and an external connection terminal connected to the portion of the conductor exposed from the opening. In a plan view of the semiconductor device, the external connection terminal covers the entire opening, and the entire external connection terminal is within the recess.

A manufacturing method of a combing bump structure is disclosed. In the manufacturing method, a semiconductor substrate is provided, a pad is formed on the semiconductor substrate, a conductive layer is formed on the pad, a solder bump is formed on the conductive layer, and at least two metal side walls are formed disposed along opposing laterals of the solder bump respectively.

A semiconductor structure includes providing a substrate including a first surface and a second surface opposite to the first surface. The first surface is a functional surface. The method also includes forming a plastic seal layer on the first surface of the substrate, and performing a thinning-down process on the second surface of the substrate after forming the plastic seal layer. The plastic seal layer provides support for the substrate during the thinning-down process, and thus warping or cracking of the plastic seal layer 240 may be avoided. In addition, the plastic seal layer can also be used as a material for packaging the substrate. Therefore, after the thinning-down process, the plastic seal layer does not need to be removed. As such, the fabrication process is simplified, and the production cost is reduced.

A semiconductor device includes a substrate includes a first layer and a second layer over the first layer, a bump disposed over the second layer, a molding disposed over the second layer and surrounding the bump, and a retainer disposed over the second layer, wherein the retainer is disposed between the molding and a periphery of the substrate. Further, a method of manufacturing a semiconductor device includes providing a substrate, disposing several bumps on the substrate, disposing a retainer on the substrate and surrounding the bumps, and disposing a molding between the bumps and the retainer.

Representative implementations of devices and techniques provide interconnect structures and components for coupling various carriers, printed circuit board (PCB) components, integrated circuit (IC) dice, and the like, using tall and/or fine pitch physical connections. Multiple layers of conductive structures or materials are arranged to form the interconnect structures and components. Nonwettable barriers may be used with one or more of the layers to form a shape, including a pitch of one or more of the layers.

Wafers and methods of forming solder balls include etching a hole in a final redistribution layer over a terminal contact pad on a wafer to expose the terminal contact pad. Solder is injected into the hole using an injection nozzle that is in direct contact with the final redistribution layer. The final redistribution layer is etched back. The injected solder is reflowed to form a solder ball.

The disclosure is directed to an integrated circuit structure for joining wafers and methods of forming same. The IC structure may include: a metallic pillar over a substrate, the metallic pillar including an upper surface; a wetting inhibitor layer about a periphery of the upper surface of the metallic pillar; and a solder material over the upper surface of the metallic pillar, the solder material being within and constrained by the wetting inhibitor layer. The sidewall of the metallic pillar may be free of the solder material. The method may include: forming a metallic pillar over a substrate, the metallic pillar having an upper surface; forming a wetting inhibitor layer about a periphery of the upper surface of the metallic pillar; and forming a solder material over the upper surface of the metallic pillar within and constrained by the wetting inhibitor layer.

Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements by heating the first interconnect elements, and coupling a first portion of a plurality of individual second interconnect elements to corresponding first interconnect elements with a second portion of the individual second interconnect elements exposed.

Wafers include multiple bulk redistribution layers. A contact pad is formed on a surface of one of the bulk redistribution layers. A final redistribution layer is formed on the surface and in contact with the contact pad. Solder is formed on the contact pad. The solder includes a pedestal portion formed to a same height as the final redistribution layer and a ball portion above the pedestal portion.

A combing bump structure includes a semiconductor substrate, a pad, a conductive layer, a solder bump and at least two metal side walls The pad is disposed on the semiconductor substrate. The conductive layer is disposed on the pad. The solder bump is disposed on the conductive layer. The at least two metal side walls are disposed along opposing outer side walls of the solder bump respectively.