In an embodiment, a structure includes a core substrate, a redistribution structure coupled, the redistribution structure including a plurality of redistribution layers, the plurality of redistribution layers comprising a dielectric layer and a metallization layer, a first local interconnect component embedded in a first redistribution layer of the plurality of redistribution layers, the first local interconnect component comprising conductive connectors, the conductive connectors being bonded to a metallization pattern of the first redistribution layer, the dielectric layer of the first redistribution layer encapsulating the first local interconnect component, a first integrated circuit die coupled to the redistribution structure, a second integrated circuit die coupled to the redistribution structure, an interconnect structure of the first local interconnect component electrically coupling the first integrated circuit die to the second integrated circuit die, and a set of conductive connectors coupled to a second side of the core substrate.

A semiconductor package structure is provided. The semiconductor package structure includes a redistribution layer (RDL) structure formed on a non-active surface of a semiconductor die. An antenna structure includes a first antenna element formed in the RDL structure, a first insulating layer covering the RDL structure, a second insulating layer formed on the first insulating layer, and a second antenna element formed on and in direct contact with the second insulating layer.

Embodiments of the present disclosure are directed to using direct ink printing on chips or interposer pads to replace the other die bonding process, e.g., conductive adhesive, Anisotropic Conductive Film (ACF), solder, etc. Direct printing on contact pads of chips and/or interposers to replace using ACF bonding provides simplicity of manufacturing process, reduced cost by eliminating ACF, reduced interconnect resistance by eliminating ACF interface, and increased reliability by eliminating ACF bonding instability. Direct printing according to embodiments of the present disclosure can make complex design patterns with fine pitch capability (sub 10 micron is feasible by using aerosol jet printing, 30 microns or above for screen printing). Such direct printing can also enable roll to roll printing process for high volume production.

A semiconductor device, and method of making the same, comprising a plurality of conductive studs formed over an active surface of a semiconductor die. The plurality of conductive studs may be disposed around a device mount site, wherein the device mount site comprises conductive interconnects comprising a height less than a height of the plurality of conductive studs. An encapsulant may be disposed around the semiconductor die and the conductive studs. A portion of the conductive studs may be exposed from the encapsulant at a planar surface. A build-up interconnect structure comprising one or more layers may be disposed over and coupled to the planar surface, the conductive studs, and the conductive interconnect. A device may be coupled to the conductive interconnects of the device mount site.

A package structure includes at least one semiconductor die, a plurality of hollow cylinders, an insulating encapsulant, a redistribution layer and through holes. The plurality of hollow cylinders is surrounding the at least one semiconductor die. The insulating encapsulant has a top surface and a bottom surface opposite to the top surface, wherein the insulating encapsulant encapsulates the at least one semiconductor die and the plurality of hollow cylinders. The redistribution layer is disposed on the top surface of the insulant encapsulant and over the at least one semiconductor die. The through holes are penetrating through the plurality of hollow cylinders.

A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor die surrounded by a first molding compound layer. A redistribution layer (RDL) structure is formed on a non-active surface of the semiconductor die and the first molding compound layer. A second molding compound layer is formed on the RDL structure. An insulating capping layer covers the second molding compound layer. An antenna is electrically coupled to the semiconductor die and includes a first antenna element formed in the RDL structure and a second antenna element formed between the second molding compound layer and the insulating capping layer.

A display device and a method of making the display device are discussed. The display device includes a substrate, a plurality of partition walls disposed on the substrate, a plurality of semiconductor light emitting elements disposed on the substrate and disposed between the plurality of partition walls, and a passivation layer covering at least parts of the plurality of semiconductor light emitting elements and at least parts of the plurality of partition walls, wherein the passivation layer extends from side surfaces of the plurality of partition walls in a direction toward the plurality of semiconductor light emitting elements, so as to cover at least parts of the side surfaces of the plurality of partition walls and at least the parts of the plurality of semiconductor light emitting elements.

A method of forming a semiconductor structure includes: providing a first inter-level dielectric (ILD) layer overlying a molding layer, the molding layer including a transmitter ground structure and a receiver ground structure; forming first openings through the first ILD layer to expose the transmitter and receiver ground structures; forming first lower transmitter and receiver electrodes in the first openings to be respectively coupled to the transmitter and receiver ground structures; forming a first dielectric waveguide overlying the first ILD layer, and first lower transmitter and receiver electrodes; depositing a second ILD layer overlying the first dielectric waveguide; forming second lower transmitter and receiver electrodes extending through the second ILD and respectively coupled to the transmitter and receiver ground structures; and forming a second dielectric waveguide overlying the second ILD layer and the second lower transmitter and receiver electrodes.

A method of forming a semiconductor device is provided. The method includes placing a semiconductor die on a carrier substrate and placing a sacrificial blank on the carrier substrate with a routing structure attached to the sacrificial blank. At least a portion of the semiconductor die, sacrificial blank, and routing structure are encapsulated with an encapsulant. The carrier substrate is separated from a first side of the encapsulated semiconductor die, sacrificial blank, and routing structure to expose a surface of the sacrificial blank. The sacrificial blank is etched to form a cavity in the encapsulant and expose a portion of the routing structure exposed through the cavity.

A package structure include a ground plate, a semiconductor die, a molding compound, and an antenna element. The semiconductor die is located over the ground plate. The molding compound is located over the semiconductor die. The antenna element is located in the molding compound and overlaps with the ground plate along a stacking direction of the ground plate, the semiconductor die and the molding compound. The antenna element has a first side levelled with a first surface of the molding compound, and the ground plate is located between the semiconductor die and the antenna element.