A light-emitting device includes a first light-emitting element, a second light-emitting element having a peak emission wavelength different from that of the first light-emitting element, a light-guide member covering a light extracting surface and lateral surfaces of the first light-emitting element and a light extracting surface and lateral surfaces of the second light-emitting element, and a wavelength conversion layer continuously covering the light extracting surface of each of the first and second light-emitting elements and disposed apart from each of the first and second light-emitting elements, and a first reflective member covering outer lateral surfaces of the light-guide member. An angle defined by an active layer of the first light-emitting element and an active layer of the second light-emitting element is less than 180° at a wavelength conversion layer side.

A semiconductor device includes an insulating substrate having a main surface, a semiconductor element, a case member, and a sealing resin as a sealing material. The case member includes a recess that is continuous with a connection portion of the case member connected to the insulating substrate, and that faces the internal region. The recess includes a facing surface as an inner wall portion facing the main surface of the insulating substrate. A distance from the main surface of the insulating substrate to the facing surface as the inner wall portion is greater than a distance from the main surface to an upper surface of the semiconductor element.

A package that includes a substrate having a first surface; a solder resist layer coupled to the first surface of the substrate; a device located over the solder resist layer such that a portion of the device touches the solder resist layer; and an encapsulation layer located over the solder resist layer such that the encapsulation layer encapsulates the device. The solder resist layer is configured as a seating plane for the device. The device is located over the solder resist layer such that a surface of the device facing the substrate is approximately parallel to the first surface of the substrate. The solder resist layer includes at least one notch. The device is located over the solder resist layer such that at least one corner of the device touches the at least one notch.

According to one embodiment, the electrode pads are provided at a surface of the substrate. The metal pad is provided at the surface of the substrate. The electronic component is mounted to the surface of the substrate. The electronic component includes a plurality of opposing electrodes. The opposing electrodes oppose the electrode pads in a direction toward the surface direction and are electrically connected to the electrode pads. The positioning component is fixed to the metal pad. A gap between the positioning component and the electronic component in an in-plane direction of the surface of the substrate is shorter than a minimum distance of the electrode pads.

A packaged semiconductor device and a method and apparatus for forming the same are disclosed. In an embodiment, a method includes bonding a device die to a first surface of a substrate; depositing an adhesive on the first surface of the substrate; depositing a thermal interface material on a surface of the device die opposite the substrate; placing a lid over the device die and the substrate, the lid contacting the adhesive and the thermal interface material; applying a clamping force to the lid and the substrate; and while applying the clamping force, curing the adhesive and the thermal interface material.

A semiconductor device package includes a substrate, a semiconductor device, and an underfill. The semiconductor device is disposed on the substrate. The semiconductor device includes a first lateral surface. The underfill is disposed between the substrate and the semiconductor device. The underfill includes a first lateral surface. The first lateral surface of the underfill and the first lateral surface of the semiconductor device are substantially coplanar.

An object of the present invention is to provide a highly reliable semiconductor device that allows voids remaining in a bonding material to be reduced. The semiconductor device includes a semiconductor chip, an insulation substrate, a metal base plate, a resin section, and a bump. The semiconductor chip is warped into a concave shape. On the insulation substrate, the semiconductor chip is mounted by bonding. The metal base plate has the insulation substrate mounted thereon and has a heat dissipation property. The resin section seals the insulation substrate and the semiconductor chip. The bump is disposed in a joint between the semiconductor chip and the insulation substrate. A warp amount of the semiconductor chip warped into a concave shape is equal to or greater than 1 m and less than a height of the bump.

A semiconductor device includes an insulating substrate having a main surface, a semiconductor element, a case member, and a sealing resin as a sealing material. The case member includes a recess that is continuous with a connection portion of the case member connected to the insulating substrate, and that faces the internal region. The recess includes a facing surface as an inner wall portion facing the main surface of the insulating substrate. A distance from the main surface of the insulating substrate to the facing surface as the inner wall portion is greater than a distance from the main surface to an upper surface of the semiconductor element.

A semiconductor device package includes a substrate, a semiconductor device, and an underfill. The semiconductor device is disposed on the substrate. The semiconductor device includes a first lateral surface. The underfill is disposed between the substrate and the semiconductor device. The underfill includes a first lateral surface. The first lateral surface of the underfill and the first lateral surface of the semiconductor device are substantially coplanar.

One or more embodiments are directed to semiconductor packages and methods in which one or more electrical components are positioned between a semiconductor die and a surface of a substrate. In one embodiment, a semiconductor package includes a substrate having a first surface. One or more electrical components are electrically coupled to electrical contacts on the first surface of the substrate. A semiconductor die is positioned on the one or more electrical components, and the semiconductor die has an active surface that faces away from the substrate. An adhesive layer is on the first surface of the substrate and on the one or more electrical components, and the semiconductor die is spaced apart from the one or more electrical components by the adhesive layer. Wire bonds are provided that electrically couples the active surface of the semiconductor die to the substrate.